1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32d -O0" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  int
       7  f0 ()
       8  {
       9    float b;
      10    vfloat32m1_t c;
      11    vbool32_t d = __riscv_vmflt_vf_f32m1_b32 (c, b, 8);
      12    return 0;
      13  }
      14  
      15  int
      16  f1 ()
      17  {
      18    vfloat32m1_t c;
      19    vbool32_t d = __riscv_vmflt_vf_f32m1_b32 (c, 0, 8);
      20    return 0;
      21  }
      22  
      23  int
      24  f2 ()
      25  {
      26    vfloat32m1_t c;
      27    vbool32_t d = __riscv_vmflt_vf_f32m1_b32 (c, 55.55, 8);
      28    return 0;
      29  }
      30  
      31  int
      32  f3 ()
      33  {
      34    int32_t b;
      35    vint32m1_t c;
      36    vbool32_t d = __riscv_vmseq_vx_i32m1_b32 (c, b, 8);
      37    return 0;
      38  }
      39  
      40  int
      41  f4 ()
      42  {
      43    vint32m1_t c;
      44    vbool32_t d = __riscv_vmseq_vx_i32m1_b32 (c, 11, 8);
      45    return 0;
      46  }
      47  
      48  int
      49  f5 ()
      50  {
      51    int64_t b;
      52    vint64m1_t c;
      53    vbool64_t d = __riscv_vmseq_vx_i64m1_b64 (c, b, 8);
      54    return 0;
      55  }
      56  
      57  int
      58  f6 ()
      59  {
      60    vint64m1_t c;
      61    vbool64_t d = __riscv_vmseq_vx_i64m1_b64 (c, 11, 8);
      62    return 0;
      63  }
      64  
      65  int
      66  f7 ()
      67  {
      68    vint64m1_t c;
      69    vbool64_t d = __riscv_vmseq_vx_i64m1_b64 (c, 0xAAAA, 8);
      70    return 0;
      71  }
      72  
      73  int
      74  f8 ()
      75  {
      76    vint64m1_t c;
      77    vbool64_t d = __riscv_vmseq_vx_i64m1_b64 (c, 0xAAAAAAAAAAAAAA, 8);
      78    return 0;
      79  }