1 /* { dg-do compile } */
2 /* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
3 /* { dg-final { check-function-bodies "**" "" } } */
4 #include "riscv_vector.h"
5
6 /*
7 ** f0:
8 ** ...
9 ** vand\.vi\tv[0-9]+,\s*v[0-9]+,\s*-16
10 ** vand\.vi\tv[0-9]+,\s*v[0-9]+,\s*-16
11 ** ...
12 ** ret
13 */
14 void f0 (void * in, void *out, int64_t x, int n)
15 {
16 vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
17 vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
18 vint64m1_t v3 = __riscv_vand_vx_i64m1 (v2, -16, 4);
19 vint64m1_t v4 = __riscv_vand_vx_i64m1 (v3, -16, 4);
20 __riscv_vse64_v_i64m1 (out + 2, v4, 4);
21 }
22
23 /*
24 ** f1:
25 ** ...
26 ** vand\.vi\tv[0-9]+,\s*v[0-9]+,\s*15
27 ** vand\.vi\tv[0-9]+,\s*v[0-9]+,\s*15
28 ** ...
29 ** ret
30 */
31 void f1 (void * in, void *out, int64_t x, int n)
32 {
33 vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
34 vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
35 vint64m1_t v3 = __riscv_vand_vx_i64m1 (v2, 15, 4);
36 vint64m1_t v4 = __riscv_vand_vx_i64m1 (v3, 15, 4);
37 __riscv_vse64_v_i64m1 (out + 2, v4, 4);
38 }
39
40 /*
41 ** f2:
42 ** ...
43 ** vand\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
44 ** vand\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
45 ** ...
46 ** ret
47 */
48 void f2 (void * in, void *out, int64_t x, int n)
49 {
50 vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
51 vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
52 vint64m1_t v3 = __riscv_vand_vx_i64m1 (v2, 16, 4);
53 vint64m1_t v4 = __riscv_vand_vx_i64m1 (v3, 16, 4);
54 __riscv_vse64_v_i64m1 (out + 2, v4, 4);
55 }
56
57 /*
58 ** f3:
59 ** ...
60 ** vand\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
61 ** vand\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
62 ** ...
63 ** ret
64 */
65 void f3 (void * in, void *out, int64_t x, int n)
66 {
67 vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
68 vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
69 vint64m1_t v3 = __riscv_vand_vx_i64m1 (v2, 0xAAAAAAAA, 4);
70 vint64m1_t v4 = __riscv_vand_vx_i64m1 (v3, 0xAAAAAAAA, 4);
71 __riscv_vse64_v_i64m1 (out + 2, v4, 4);
72 }
73
74 /*
75 ** f4:
76 ** ...
77 ** vand\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
78 ** vand\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
79 ** ...
80 ** ret
81 */
82 void f4 (void * in, void *out, int64_t x, int n)
83 {
84 vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
85 vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
86 vint64m1_t v3 = __riscv_vand_vx_i64m1 (v2, 0xAAAAAAAAAAAAAAAA, 4);
87 vint64m1_t v4 = __riscv_vand_vx_i64m1 (v3, 0xAAAAAAAAAAAAAAAA, 4);
88 __riscv_vse64_v_i64m1 (out + 2, v4, 4);
89 }
90
91 /*
92 ** f5:
93 ** ...
94 ** vand\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
95 ** vand\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
96 ** ...
97 ** ret
98 */
99 void f5 (void * in, void *out, int64_t x, int n)
100 {
101 vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
102 vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
103 vint64m1_t v3 = __riscv_vand_vx_i64m1 (v2, 0xAAAAAAAAAAAAAAAA, 4);
104 vint64m1_t v4 = __riscv_vand_vx_i64m1 (v3, 0xAAAAAAAAAAAAAAAA, 4);
105 __riscv_vse64_v_i64m1 (out + 2, v4, 4);
106 }
107
108 /*
109 ** f6:
110 ** ...
111 ** vand\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
112 ** vand\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
113 ** ...
114 ** ret
115 */
116 void f6 (void * in, void *out, int64_t x, int n)
117 {
118 vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
119 vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
120 vint64m1_t v3 = __riscv_vand_vx_i64m1 (v2, x, 4);
121 vint64m1_t v4 = __riscv_vand_vx_i64m1 (v3, x, 4);
122 __riscv_vse64_v_i64m1 (out + 2, v4, 4);
123 }