1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -O3" } */
       3  #include "riscv_vector.h"
       4  
       5  void f (void * in, void *out, int32_t x, int n)
       6  {
       7    for (int i = 0; i < n; i++) {
       8      vint64m1_t v = __riscv_vle64_v_i64m1 (in + i + 1, 4);
       9      vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + i + 2, 4);
      10      vint64m1_t v3 = __riscv_vadd_vx_i64m1 (v2, x, 4);
      11      vint64m1_t v4 = __riscv_vadd_vx_i64m1_tu (v3, v2, x, 4);
      12      __riscv_vse64_v_i64m1 (out + i + 2, v4, 4);
      13    }
      14  }
      15  
      16  /* { dg-final { scan-assembler-times {vlse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*zero\s+\.L[0-9]+\:\s+} 1 } } */
      17  /* { dg-final { scan-assembler-times {vadd\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 2 } } */
      18  /* { dg-final { scan-assembler-not {vmv} } } */