1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
       3  /* { dg-final { check-function-bodies "**" "" } } */
       4  
       5  #include "riscv_vector.h"
       6  
       7  /*
       8  ** f1:
       9  **  ...
      10  **	vsetvli\t[a-x0-9]+,\s*zero,e32,m1,tu,m[au]
      11  **  ...
      12  **	vslide1down\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      13  **  ...
      14  **	vslide1down\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      15  **  ...
      16  **	vslide1down\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      17  **  ...
      18  **	vslide1down\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      19  **  ...
      20  **	vslide1down\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      21  **  ...
      22  **	vslide1down\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      23  **  ...
      24  **	vmerge\.vvm\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
      25  **  ...
      26  **	ret
      27  */
      28  void f1 (void * in, void *out, int64_t x, int vl)
      29  {
      30    vbool64_t m = __riscv_vlm_v_b64 (in, vl);
      31    vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, vl);
      32    vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, vl);
      33    vint64m1_t v3 = __riscv_vslide1down_vx_i64m1 (v2, x, 0x80000000);
      34    vint64m1_t v4 = __riscv_vslide1down_vx_i64m1_tu (v3, v3, x, 0x80000000);
      35    vint64m1_t v5 = __riscv_vslide1down_vx_i64m1_tumu (m, v4, v4, x, 0x80000000);
      36    __riscv_vse64_v_i64m1 (out + 2, v5, vl);
      37  }
      38  
      39  /*
      40  ** f2:
      41  **  ...
      42  **	vsetvli\t[a-x0-9]+,\s*zero,e32,m1,tu,m[au]
      43  **  ...
      44  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      45  **  ...
      46  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      47  **  ...
      48  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      49  **  ...
      50  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      51  **  ...
      52  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      53  **  ...
      54  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      55  **  ...
      56  **	vmerge\.vvm\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
      57  **  ...
      58  **	ret
      59  */
      60  void f2 (void * in, void *out, int64_t x, int vl)
      61  {
      62    vbool64_t m = __riscv_vlm_v_b64 (in, vl);
      63    vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, vl);
      64    vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, vl);
      65    vint64m1_t v3 = __riscv_vslide1up_vx_i64m1 (v2, x, 0x80000000);
      66    vint64m1_t v4 = __riscv_vslide1up_vx_i64m1_tu (v3, v3, x, 0x80000000);
      67    vint64m1_t v5 = __riscv_vslide1up_vx_i64m1_tumu (m, v4, v4, x, 0x80000000);
      68    __riscv_vse64_v_i64m1 (out + 2, v5, vl);
      69  }
      70  
      71  /* { dg-final { scan-assembler-times {vmv} 3 } } */