1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
       3  /* { dg-final { check-function-bodies "**" "" } } */
       4  
       5  #include "riscv_vector.h"
       6  
       7  /*
       8  ** f0:
       9  **  ...
      10  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      11  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      12  **  ...
      13  **	ret
      14  */
      15  void f0 (void * in, void *out, int64_t x, int n)
      16  {
      17    vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
      18    vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
      19    vint64m1_t v3 = __riscv_vslide1up_vx_i64m1 (v2, -16, 4);
      20    vint64m1_t v4 = __riscv_vslide1up_vx_i64m1 (v3, -16, 4);
      21    __riscv_vse64_v_i64m1 (out + 2, v4, 4);
      22  }
      23  
      24  /*
      25  ** f1:
      26  **  ...
      27  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      28  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      29  **  ...
      30  **	ret
      31  */
      32  void f1 (void * in, void *out, int64_t x, int n)
      33  {
      34    vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
      35    vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
      36    vint64m1_t v3 = __riscv_vslide1up_vx_i64m1 (v2, 15, 4);
      37    vint64m1_t v4 = __riscv_vslide1up_vx_i64m1 (v3, 15, 4);
      38    __riscv_vse64_v_i64m1 (out + 2, v4, 4);
      39  }
      40  
      41  /*
      42  ** f2:
      43  **  ...
      44  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      45  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      46  **  ...
      47  **	ret
      48  */
      49  void f2 (void * in, void *out, int64_t x, int n)
      50  {
      51    vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
      52    vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
      53    vint64m1_t v3 = __riscv_vslide1up_vx_i64m1 (v2, 16, 4);
      54    vint64m1_t v4 = __riscv_vslide1up_vx_i64m1 (v3, 16, 4);
      55    __riscv_vse64_v_i64m1 (out + 2, v4, 4);
      56  }
      57  
      58  /*
      59  ** f3:
      60  **  ...
      61  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*zero
      62  **  ...
      63  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      64  **  ...
      65  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*zero
      66  **  ...
      67  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      68  **  ...
      69  **	ret
      70  */
      71  void f3 (void * in, void *out, int64_t x, int n)
      72  {
      73    vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
      74    vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
      75    vint64m1_t v3 = __riscv_vslide1up_vx_i64m1 (v2, 0xAAAAAAAA, 4);
      76    vint64m1_t v4 = __riscv_vslide1up_vx_i64m1 (v3, 0xAAAAAAAA, 4);
      77    __riscv_vse64_v_i64m1 (out + 2, v4, 4);
      78  }
      79  
      80  /*
      81  ** f4:
      82  **  ...
      83  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      84  **  ...
      85  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      86  **  ...
      87  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      88  **  ...
      89  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      90  **  ...
      91  **	ret
      92  */
      93  void f4 (void * in, void *out, int64_t x, int n)
      94  {
      95    vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
      96    vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
      97    vint64m1_t v3 = __riscv_vslide1up_vx_i64m1 (v2, 0xAAAAAAAAAAAAAAAA, 4);
      98    vint64m1_t v4 = __riscv_vslide1up_vx_i64m1 (v3, 0xAAAAAAAAAAAAAAAA, 4);
      99    __riscv_vse64_v_i64m1 (out + 2, v4, 4);
     100  }
     101  
     102  /*
     103  ** f5:
     104  **  ...
     105  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
     106  **  ...
     107  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
     108  **  ...
     109  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
     110  **  ...
     111  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
     112  **  ...
     113  **	ret
     114  */
     115  void f5 (void * in, void *out, int64_t x, int n)
     116  {
     117    vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
     118    vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
     119    vint64m1_t v3 = __riscv_vslide1up_vx_i64m1 (v2, 0xAAAAAAAAAAAAAAAA, 4);
     120    vint64m1_t v4 = __riscv_vslide1up_vx_i64m1 (v3, 0xAAAAAAAAAAAAAAAA, 4);
     121    __riscv_vse64_v_i64m1 (out + 2, v4, 4);
     122  }
     123  
     124  /*
     125  ** f6:
     126  **  ...
     127  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
     128  **  ...
     129  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
     130  **  ...
     131  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
     132  **  ...
     133  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
     134  **  ...
     135  **	ret
     136  */
     137  void f6 (void * in, void *out, int64_t x, int n)
     138  {
     139    vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
     140    vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
     141    vint64m1_t v3 = __riscv_vslide1up_vx_i64m1 (v2, x, 4);
     142    vint64m1_t v4 = __riscv_vslide1up_vx_i64m1 (v3, x, 4);
     143    __riscv_vse64_v_i64m1 (out + 2, v4, 4);
     144  }
     145  
     146  /*
     147  ** f7:
     148  **  ...
     149  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*zero
     150  **	vslide1up\.vx\tv[0-9]+,\s*v[0-9]+,\s*zero
     151  **  ...
     152  **	ret
     153  */
     154  void f7 (void * in, void *out, int64_t x, int n)
     155  {
     156    vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
     157    vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
     158    vint64m1_t v3 = __riscv_vslide1up_vx_i64m1 (v2, 0, 4);
     159    vint64m1_t v4 = __riscv_vslide1up_vx_i64m1 (v3, 0, 4);
     160    __riscv_vse64_v_i64m1 (out + 2, v4, 4);
     161  }
     162  
     163  /* { dg-final { scan-assembler-not {vmv} } } */