1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
       3  /* { dg-final { check-function-bodies "**" "" } } */
       4  #include "riscv_vector.h"
       5  
       6  /*
       7  ** f1:
       8  **	...
       9  **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      10  **  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
      11  **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      12  **	vmandn\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
      13  **	...
      14  **	ret
      15  */
      16  void f1 (void * in, void * in2, void *out, int32_t x)
      17  {
      18      vint32m1_t v = __riscv_vle32_v_i32m1 (in, 4);
      19      vint32m1_t v2 = __riscv_vle32_v_i32m1 (in2, 4);
      20      vbool32_t m3 = __riscv_vmsge_vx_i32m1_b32 (v, 17, 4);
      21      vbool32_t m4 = __riscv_vmsge_vx_i32m1_b32_mu (m3, m3, v2, 17, 4);
      22      __riscv_vsm_v_b32 (out, m4, 4);
      23  }
      24  
      25  /*
      26  ** f2:
      27  **	...
      28  **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      29  **  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
      30  **	vmslt\.vx\tv[1-9][0-9]?,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t
      31  **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
      32  **	...
      33  **	ret
      34  */
      35  void f2 (void * in, void *out, int32_t x)
      36  {
      37      vbool32_t mask = *(vbool32_t*)in;
      38      asm volatile ("":::"memory");
      39      vint32m1_t v = __riscv_vle32_v_i32m1 (in, 4);
      40      vint32m1_t v2 = __riscv_vle32_v_i32m1_m (mask, in, 4);
      41      vbool32_t m3 = __riscv_vmsge_vx_i32m1_b32 (v, 17, 4);
      42      vbool32_t m4 = __riscv_vmsge_vx_i32m1_b32_mu (mask, m3, v2, 17, 4);
      43      __riscv_vsm_v_b32 (out, m4, 4);
      44  }
      45  
      46  /*
      47  ** f3:
      48  **	...
      49  **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      50  **  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
      51  **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t
      52  **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
      53  **	...
      54  **	ret
      55  */
      56  void f3 (void * in, void *out, int32_t x)
      57  {
      58      vbool32_t mask = *(vbool32_t*)in;
      59      asm volatile ("":::"memory");
      60      vint32m1_t v = __riscv_vle32_v_i32m1 (in, 4);
      61      vint32m1_t v2 = __riscv_vle32_v_i32m1_m (mask, in, 4);
      62      vbool32_t m3 = __riscv_vmsge_vx_i32m1_b32 (v, 17, 4);
      63      vbool32_t m4 = __riscv_vmsge_vx_i32m1_b32_m (m3, v2, 17, 4);
      64      __riscv_vsm_v_b32 (out, m4, 4);
      65  }