1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
       3  #include "riscv_vector.h"
       4  
       5  void f1 (void * in, void *out, int32_t x)
       6  {
       7      vbool32_t mask = *(vbool32_t*)in;
       8      asm volatile ("":::"memory");
       9      vint32m1_t v = __riscv_vle32_v_i32m1 (in, 4);
      10      vint32m1_t v2 = __riscv_vle32_v_i32m1_m (mask, in, 4);
      11      vbool32_t m3 = __riscv_vmsge_vx_i32m1_b32 (v, x, 4);
      12      vbool32_t m4 = __riscv_vmsge_vx_i32m1_b32_mu (m3, m3, v2, x, 4);
      13      __riscv_vsm_v_b32 (out, m4, 4);
      14  }
      15  
      16  /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+\s+} 2 } } */
      17  /* { dg-final { scan-assembler-times {vmandn\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 1 } } */
      18  /* { dg-final { scan-assembler-times {vmnot\.m\s+v[0-9]+,\s*v[0-9]+} 1 } } */
      19  /* { dg-final { scan-assembler-not {vmv} } } */