1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
       3  /* { dg-final { check-function-bodies "**" "" } } */
       4  #include "riscv_vector.h"
       5  
       6  /*
       7  ** f0:
       8  **  ...
       9  **	vmslt\.vi\tv[0-9]+,\s*v[0-9]+,\s*-15
      10  **	vmslt\.vi\tv[0-9]+,\s*v[0-9]+,\s*-15,v0.t
      11  **  ...
      12  **	ret
      13  */
      14  void f0 (void * in, void *out, int64_t x, int n)
      15  {
      16    vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
      17    vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
      18    vbool64_t v3 = __riscv_vmslt_vx_i64m1_b64 (v2, -15, 4);
      19    vbool64_t v4 = __riscv_vmslt_vx_i64m1_b64_m (v3, v2, -15, 4);
      20    __riscv_vsm_v_b64 (out + 2, v4, 4);
      21  }
      22  
      23  /*
      24  ** f1:
      25  **  ...
      26  **	vmslt\.vi\tv[0-9]+,\s*v[0-9]+,\s*16
      27  **	vmslt\.vi\tv[0-9]+,\s*v[0-9]+,\s*16,v0.t
      28  **  ...
      29  **	ret
      30  */
      31  void f1 (void * in, void *out, int64_t x, int n)
      32  {
      33    vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
      34    vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
      35    vbool64_t v3 = __riscv_vmslt_vx_i64m1_b64 (v2, 16, 4);
      36    vbool64_t v4 = __riscv_vmslt_vx_i64m1_b64_m (v3, v2, 16, 4);
      37    __riscv_vsm_v_b64 (out + 2, v4, 4);
      38  }
      39  
      40  /*
      41  ** f2:
      42  **  ...
      43  **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      44  **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t
      45  **  ...
      46  **	ret
      47  */
      48  void f2 (void * in, void *out, int64_t x, int n)
      49  {
      50    vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
      51    vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
      52    vbool64_t v3 = __riscv_vmslt_vx_i64m1_b64 (v2, 17, 4);
      53    vbool64_t v4 = __riscv_vmslt_vx_i64m1_b64_m (v3, v2, 17, 4);
      54    __riscv_vsm_v_b64 (out + 2, v4, 4);
      55  }
      56  
      57  /*
      58  ** f3:
      59  **  ...
      60  **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
      61  **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t
      62  **  ...
      63  **	ret
      64  */
      65  void f3 (void * in, void *out, int64_t x, int n)
      66  {
      67    vint64m1_t v = __riscv_vle64_v_i64m1 (in + 1, 4);
      68    vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in + 2, 4);
      69    vbool64_t v3 = __riscv_vmslt_vx_i64m1_b64 (v2, 0xAAAAAAA, 4);
      70    vbool64_t v4 = __riscv_vmslt_vx_i64m1_b64_m (v3, v2, 0xAAAAAAA, 4);
      71    __riscv_vsm_v_b64 (out + 2, v4, 4);
      72  }