1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -O3" } */
       3  #include "riscv_vector.h"
       4  
       5  void f1 (void * in, void *out, int32_t x)
       6  {
       7      vint32m1_t v = __riscv_vle32_v_i32m1 (in, 4);
       8      vint32m1_t v2 = __riscv_vle32_v_i32m1_tu (v, in, 4);
       9      vint32m1_t v3 = __riscv_vaadd_vx_i32m1 (v2, 0, 4);
      10      __riscv_vse32_v_i32m1 (out, v3, 4);
      11  }
      12  
      13  void f2 (void * in, void *out, int32_t x)
      14  {
      15      vint64m1_t v = __riscv_vle64_v_i64m1 (in, 4);
      16      vint64m1_t v2 = __riscv_vle64_v_i64m1_tu (v, in, 4);
      17      vint64m1_t v3 = __riscv_vaadd_vx_i64m1 (v2, 0, 4);
      18      __riscv_vse64_v_i64m1 (out, v3, 4);
      19  }
      20  
      21  /* { dg-final { scan-assembler-times {vaadd\.vx\s+v[0-9]+,\s*v[0-9]+,zero} 2 } } */