(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
powerpc/
vec-strir-5.c
       1  /* { dg-do run { target { power10_hw } } } */
       2  /* { dg-do link { target { ! power10_hw } } } */
       3  /* { dg-require-effective-target power10_ok } */
       4  /* { dg-options "-mdejagnu-cpu=power10" } */
       5  
       6  #include <altivec.h>
       7  
       8  extern void abort (void);
       9  
      10  /* Vector string isolate right-justified on array of unsigned short.  */
      11  vector unsigned short
      12  sirj (vector unsigned short arg)
      13  {
      14    return vec_strir (arg);
      15  }
      16  
      17  int main (int argc, short *argv [])
      18  {
      19    vector unsigned short input1 =
      20      { 0x1, 0x3, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
      21    vector unsigned short expected1 =
      22      { 0x1, 0x3, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
      23    vector unsigned short input2 =
      24      { 0x1, 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
      25    vector unsigned short expected2 =
      26      { 0x0, 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
      27    vector unsigned short input3 =
      28      { 0x1, 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0x0 };
      29    vector unsigned short expected3 =
      30      { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 };
      31    vector unsigned short input4 =
      32      { 0x1, 0x3, 0x5, 0x7, 0x9, 0xb, 0xd, 0x0 };
      33    vector unsigned short expected4 =
      34      { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 };
      35  
      36    if (!vec_all_eq (sirj (input1), expected1))
      37      abort ();
      38    if (!vec_all_eq (sirj (input2), expected2))
      39      abort ();
      40    if (!vec_all_eq (sirj (input3), expected3))
      41      abort ();
      42    if (!vec_all_eq (sirj (input4), expected4))
      43      abort ();
      44  
      45  }