(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
powerpc/
vec-srd-modulo.c
       1  /* Test that using a character splat to set up a shift-right logical
       2     for a doubleword vector works correctly after gimple folding.  */
       3  
       4  /* { dg-do run { target { p8vector_hw } } } */
       5  /* { dg-options "-O2 -mpower8-vector" } */
       6  
       7  #include <altivec.h>
       8  
       9  typedef __vector unsigned long long vui64_t;
      10  
      11  static inline vui64_t
      12  vec_srdi (vui64_t vra, const unsigned int shb)
      13  {
      14    vui64_t rshift;
      15    vui64_t result;
      16  
      17    /* Note legitimate use of wrong-type splat due to expectation that only
      18       lower 6-bits are read.  */
      19    rshift = (vui64_t) vec_splat_s8 (shb);
      20  
      21    /* Vector Shift Right [Logical] Doublewords based on the lower 6-bits
      22       of corresponding element of rshift.  */
      23    result = vec_vsrd (vra, rshift);
      24  
      25    return result;
      26  }
      27  
      28  __attribute__ ((noinline)) vui64_t
      29  test_srdi_4 (vui64_t a)
      30  {
      31    return vec_srdi (a, 4);
      32  }
      33  
      34  int
      35  main ()
      36  {
      37    vui64_t x = {1992357, 1025};
      38    x = test_srdi_4 (x);
      39    if (x[0] != 124522 || x[1] != 64)
      40      __builtin_abort ();
      41    return 0;
      42  }