1  /* { dg-options "-O3 -maltivec" } */
       2  /* { dg-require-effective-target powerpc_altivec_ok } */
       3  
       4  /* Check vectorizer can exploit vector rotation instructions on Power, mainly
       5     for the case rotation count is const number.
       6  
       7     Check for instructions vrlb/vrlh/vrlw only available if altivec supported. */
       8  
       9  #define N 256
      10  unsigned int suw[N], ruw[N];
      11  unsigned short suh[N], ruh[N];
      12  unsigned char sub[N], rub[N];
      13  
      14  void
      15  testUW ()
      16  {
      17    for (int i = 0; i < 256; ++i)
      18      ruw[i] = (suw[i] >> 8) | (suw[i] << (sizeof (suw[0]) * 8 - 8));
      19  }
      20  
      21  void
      22  testUH ()
      23  {
      24    for (int i = 0; i < 256; ++i)
      25      ruh[i] = (unsigned short) (suh[i] >> 9)
      26  	     | (unsigned short) (suh[i] << (sizeof (suh[0]) * 8 - 9));
      27  }
      28  
      29  void
      30  testUB ()
      31  {
      32    for (int i = 0; i < 256; ++i)
      33      rub[i] = (unsigned char) (sub[i] >> 5)
      34  	     | (unsigned char) (sub[i] << (sizeof (sub[0]) * 8 - 5));
      35  }
      36  
      37  /* { dg-final { scan-assembler {\mvrlw\M} } } */
      38  /* { dg-final { scan-assembler {\mvrlh\M} } } */
      39  /* { dg-final { scan-assembler {\mvrlb\M} } } */