1  /* PR target/96808 */
       2  /* { dg-do compile } */
       3  /* { dg-require-effective-target power10_ok } */
       4  /* { dg-options "-O2 -mdejagnu-cpu=power10" } */
       5  
       6  /* Verify we do not ICE on the tests below.  */
       7  
       8  void
       9  old_ok (__vector_quad *dst, vector unsigned char vc)
      10  {
      11    __vector_quad vq;
      12    __builtin_mma_xxsetaccz(&vq);
      13    __builtin_mma_xvf32gerpp(&vq, vc, vc);
      14    *dst = vq;
      15  }
      16  
      17  void
      18  test0 (__vector_quad *dst, vector unsigned char vc)
      19  {
      20    __vector_quad vq[2];
      21    __builtin_mma_xxsetaccz(&vq[1]);
      22    __builtin_mma_xvf32gerpp(&vq[1], vc, vc);
      23    *dst = vq[1];
      24  }
      25  
      26  void
      27  test1 (__vector_quad *dst, vector unsigned char vc)
      28  {
      29    __vector_quad vq[2][2];
      30    __builtin_mma_xxsetaccz(&vq[1][1]);
      31    __builtin_mma_xvf32gerpp(&vq[1][1], vc, vc);
      32    *dst = vq[1][1];
      33  }
      34  
      35  void
      36  test2 (__vector_quad *dst, vector unsigned char vc)
      37  {
      38    struct {
      39      __vector_quad dummy;
      40      __vector_quad acc;
      41    } vq;
      42    __builtin_mma_xxsetaccz(&vq.acc);
      43    __builtin_mma_xvf32gerpp(&vq.acc, vc, vc);
      44    *dst = vq.acc;
      45  }
      46  
      47  void
      48  test3 (__vector_quad *dst, vector unsigned char vc)
      49  {
      50    __builtin_mma_xxsetaccz(&dst[1]);
      51    __builtin_mma_xvf32gerpp(&dst[1], vc, vc);
      52  }
      53  
      54  void
      55  test4 (__vector_quad *dst[], vector unsigned char vc)
      56  {
      57    __builtin_mma_xxsetaccz(&dst[1][2]);
      58    __builtin_mma_xvf32gerpp(&dst[1][2], vc, vc);
      59  }