1  /* { dg-do compile */
       2  /* { dg-require-effective-target powerpc_vsx_ok } */
       3  /* { dg-options "-O2 -mvsx" } */
       4  
       5  /* PR 70423, Make sure we don't generate vmaddfp or vnmsubfp.  These
       6     instructions have different rounding modes than the VSX instructions
       7     xvmaddsp and xvnmsubsp.  These tests are written where the 3 inputs and
       8     target are all separate registers.  Because vmaddfp and vnmsubfp are no
       9     longer generated the compiler will have to generate an xsmaddsp or xsnmsubsp
      10     instruction followed by a move operation.  */
      11  
      12  #include <altivec.h>
      13  
      14  vector float
      15  do_add1 (vector float dummy, vector float a, vector float b, vector float c)
      16  {
      17    return (a * b) + c;
      18  }
      19  
      20  vector float
      21  do_nsub1 (vector float dummy, vector float a, vector float b, vector float c)
      22  {
      23    return -((a * b) - c);
      24  }
      25  
      26  vector float
      27  do_add2 (vector float dummy, vector float a, vector float b, vector float c)
      28  {
      29    return vec_madd (a, b, c);
      30  }
      31  
      32  vector float
      33  do_nsub2 (vector float dummy, vector float a, vector float b, vector float c)
      34  {
      35    return vec_nmsub (a, b, c);
      36  }
      37  
      38  /* { dg-final { scan-assembler     {\mxvmadd[am]sp\M}  } } */
      39  /* { dg-final { scan-assembler     {\mxvnmsub[am]sp\M} } } */
      40  /* { dg-final { scan-assembler-not {\mvmaddfp\M}       } } */
      41  /* { dg-final { scan-assembler-not {\mvnmsubfp\M}      } } */