1  /* { dg-do compile { target powerpc*-*-* } } */
       2  /* { dg-require-effective-target powerpc_altivec_ok } */
       3  /* { dg-options "-mdejagnu-cpu=power6 -maltivec" } */
       4  
       5  vector unsigned char
       6  foo_char (void)
       7  {
       8    return (vector unsigned char) {
       9  #if __VEC_ELEMENT_REG_ORDER__ == __ORDER_BIG_ENDIAN__
      10      0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
      11      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
      12  #else
      13      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
      14      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80
      15  #endif
      16    };
      17  }
      18  
      19  vector unsigned short
      20  foo_short (void)
      21  {
      22    return (vector unsigned short) {
      23  #if __VEC_ELEMENT_REG_ORDER__ == __ORDER_BIG_ENDIAN__
      24      0x8000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
      25  #else
      26      0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x8000
      27  #endif
      28    };
      29  }
      30  
      31  vector unsigned int
      32  foo_int (void)
      33  {
      34    return (vector unsigned int) {
      35  #if __VEC_ELEMENT_REG_ORDER__ == __ORDER_BIG_ENDIAN__
      36      0x80000000u, 0x00000000u, 0x00000000u, 0x00000000u,
      37  #else
      38      0x00000000u, 0x00000000u, 0x00000000u, 0x80000000u,
      39  #endif
      40    };
      41  }
      42  
      43  /* { dg-final { scan-assembler-times "vspltisw" 3 } } */
      44  /* { dg-final { scan-assembler-times "vsldoi"   3 } } */
      45  /* { dg-final { scan-assembler-times "vslb"     1 } } */
      46  /* { dg-final { scan-assembler-times "vslh"     1 } } */
      47  /* { dg-final { scan-assembler-times "vslw"     1 } } */