1  /* Test for ICE arising from VSX code generation.  */
       2  /* { dg-do compile } */
       3  /* { dg-options "-O3 -mdejagnu-cpu=power7 -funroll-loops" } */
       4  /* { dg-require-effective-target powerpc_vsx_ok } */
       5  
       6  int sourcenode;
       7  int ARCHelems;
       8  int *source_elms;
       9  void vv12x12 (double *, double *, double *);
      10  void
      11  foo (int argc, char **argv)
      12  {
      13    int i, j;
      14    int cor[4];
      15    double Ke[12][12], Me[12], Ce[12], Mexv[12], Cexv[12], v[12];
      16    for (i = 0; i < ARCHelems; i++)
      17      {
      18        for (j = 0; j < 12; j++)
      19  	Me[j] = 0.0;
      20        if (cor[j] == sourcenode)
      21  	vv12x12 (Me, v, Mexv);
      22        vv12x12 (Ce, v, Cexv);
      23        if (source_elms[i] == 3)
      24  	for (j = 0; j < 12; j++)
      25  	  {
      26  	    v[j] = -v[j];
      27  	    Mexv[j] = -Mexv[j];
      28  	    Cexv[j] = -Cexv[j];
      29  	  }
      30      }
      31  }