1 /* { dg-do compile } */
2 /* { dg-require-effective-target powerpc_p8vector_ok } */
3 /* { dg-require-effective-target int128 } */
4 /* { dg-options "-mpower8-vector -O2" } */
5
6 #include <altivec.h>
7
8 /* Test POWER8 vector built-ins added for version 1.1 of ELFv2 ABI. */
9
10 vector signed char vsca, vscb, vscc;
11 vector unsigned char vuca, vucb, vucc;
12 vector signed short vssa, vssb;
13 vector bool char vbca, vbcb;
14 vector unsigned short vusa, vusb;
15 vector bool short vbsa, vbsb;
16 vector signed int vsia, vsib, vsic;
17 vector unsigned int vuia, vuib, vuic;
18 vector bool int vbia, vbib;
19 vector signed long long vsla, vslb;
20 vector unsigned long long vula, vulb, vulc;
21 vector bool long long vbla, vblb, vblc;
22 vector signed __int128 vsxa, vsxb, vsxc;
23 vector unsigned __int128 vuxa, vuxb, vuxc;
24 vector double vda, vdb;
25
26 void foo (vector signed char *vscr,
27 vector unsigned char *vucr,
28 vector bool char *vbcr,
29 vector signed short *vssr,
30 vector unsigned short *vusr,
31 vector bool short *vbsr,
32 vector signed int *vsir,
33 vector unsigned int *vuir,
34 vector bool int *vbir,
35 vector unsigned long long *vulr,
36 vector bool long long *vblr,
37 vector signed __int128 *vsxr,
38 vector unsigned __int128 *vuxr,
39 vector double *vdr)
40 {
41 *vsir++ = vec_addc (vsia, vsib);
42 *vuir++ = vec_addc (vuia, vuib);
43 *vsxr++ = vec_addc (vsxa, vsxb);
44 *vuxr++ = vec_addc (vuxa, vuxb);
45 *vsir++ = vec_adde (vsia, vsib, vsic);
46 *vuir++ = vec_adde (vuia, vuib, vuic);
47 *vsxr++ = vec_adde (vsxa, vsxb, vsxc);
48 *vuxr++ = vec_adde (vuxa, vuxb, vuxc);
49 *vsir++ = vec_addec (vsia, vsib, vsic);
50 *vuir++ = vec_addec (vuia, vuib, vuic);
51 *vsxr++ = vec_addec (vsxa, vsxb, vsxc);
52 *vuxr++ = vec_addec (vuxa, vuxb, vuxc);
53 *vscr++ = vec_adds (vsca, vscb);
54 *vucr++ = vec_adds (vuca, vucb);
55 *vsir++ = vec_adds (vsia, vsib);
56 *vuir++ = vec_adds (vuia, vuib);
57 *vssr++ = vec_adds (vssa, vssb);
58 *vusr++ = vec_adds (vusa, vusb);
59 *vscr++ = vec_adds (vbca, vscb);
60 *vscr++ = vec_adds (vsca, vbcb);
61 *vucr++ = vec_adds (vbca, vucb);
62 *vucr++ = vec_adds (vuca, vbcb);
63 *vsir++ = vec_adds (vbia, vsib);
64 *vsir++ = vec_adds (vsia, vbib);
65 *vuir++ = vec_adds (vbia, vuib);
66 *vuir++ = vec_adds (vuia, vbib);
67 *vssr++ = vec_adds (vbsa, vssb);
68 *vssr++ = vec_adds (vssa, vbsb);
69 *vusr++ = vec_adds (vbsa, vusb);
70 *vusr++ = vec_adds (vusa, vbsb);
71 *vucr++ = vec_bperm (vuca, vucb);
72 *vulr++ = vec_bperm (vuxa, vucb);
73 *vbcr++ = vec_eqv (vbca, vbcb);
74 *vbir++ = vec_eqv (vbia, vbib);
75 *vblr++ = vec_eqv (vbla, vblb);
76 *vbsr++ = vec_eqv (vbsa, vbsb);
77 *vucr++ = vec_gb (vuca);
78 *vbcr++ = vec_nand (vbca, vbcb);
79 *vbir++ = vec_nand (vbia, vbib);
80 *vblr++ = vec_nand (vbla, vblb);
81 *vbsr++ = vec_nand (vbsa, vbsb);
82 *vbcr++ = vec_orc (vbca, vbcb);
83 *vbir++ = vec_orc (vbia, vbib);
84 *vblr++ = vec_orc (vbla, vblb);
85 *vbsr++ = vec_orc (vbsa, vbsb);
86 *vblr++ = vec_perm (vbla, vblb, vucc);
87 *vusr++ = vec_pmsum_be (vuca, vucb);
88 *vuir++ = vec_pmsum_be (vusa, vusb);
89 *vulr++ = vec_pmsum_be (vuia, vuib);
90 *vuxr++ = vec_pmsum_be (vula, vulb);
91 *vuir++ = vec_shasigma_be (vuia, 0, 1);
92 *vulr++ = vec_shasigma_be (vula, 0, 1);
93 *vsir++ = vec_subc (vsia, vsib);
94 *vuir++ = vec_subc (vuia, vuib);
95 *vsxr++ = vec_subc (vsxa, vsxb);
96 *vuxr++ = vec_subc (vuxa, vuxb);
97 *vsir++ = vec_sube (vsia, vsib, vsic);
98 *vuir++ = vec_sube (vuia, vuib, vuic);
99 *vsxr++ = vec_sube (vsxa, vsxb, vsxc);
100 *vuxr++ = vec_sube (vuxa, vuxb, vuxc);
101 *vsir++ = vec_subec (vsia, vsib, vsic);
102 *vuir++ = vec_subec (vuia, vuib, vuic);
103 *vsxr++ = vec_subec (vsxa, vsxb, vsxc);
104 *vuxr++ = vec_subec (vuxa, vuxb, vuxc);
105 *vscr++ = vec_subs (vsca, vscb);
106 *vucr++ = vec_subs (vuca, vucb);
107 *vsir++ = vec_subs (vsia, vsib);
108 *vuir++ = vec_subs (vuia, vuib);
109 *vssr++ = vec_subs (vssa, vssb);
110 *vusr++ = vec_subs (vusa, vusb);
111 *vsir++ = vec_sum2s (vsia, vsib);
112 *vsir++ = vec_sum4s (vsca, vsib);
113 *vsir++ = vec_sum4s (vssa, vsib);
114 *vuir++ = vec_sum4s (vuca, vuib);
115
116 }
117
118 /* { dg-final { scan-assembler-times "vaddcuq" 2 } } */
119 /* { dg-final { scan-assembler-times "vaddeuqm" 2 } } */
120 /* { dg-final { scan-assembler-times "vaddecuq" 2 } } */
121 /* { dg-final { scan-assembler-times "vaddcuw" 6 } } */
122 /* { dg-final { scan-assembler-times "vadduwm" 4 } } */
123 /* { dg-final { scan-assembler-times "vsubcuq" 2 } } */
124 /* { dg-final { scan-assembler-times "vsubeuqm" 2 } } */
125 /* { dg-final { scan-assembler-times "vsubecuq" 2 } } */
126 /* { dg-final { scan-assembler-times "vsubcuw" 4 } } */
127 /* { dg-final { scan-assembler-times "vsubuwm" 4 } } */
128 /* { dg-final { scan-assembler-times "vbpermq" 2 } } */
129 /* { dg-final { scan-assembler-times "xxleqv" 4 } } */
130 /* { dg-final { scan-assembler-times "vgbbd" 1 } } */
131 /* { dg-final { scan-assembler-times "xxlnand" 4 } } */
132 /* { dg-final { scan-assembler-times "xxlorc" 4 } } */
133 /* { dg-final { scan-assembler-times "vperm" 1 } } */
134 /* { dg-final { scan-assembler-times "vpmsumb" 1 } } */
135 /* { dg-final { scan-assembler-times "vpmsumh" 1 } } */
136 /* { dg-final { scan-assembler-times "vpmsumw" 1 } } */
137 /* { dg-final { scan-assembler-times "vpmsumd" 1 } } */
138 /* { dg-final { scan-assembler-times "vshasigmaw" 1 } } */
139 /* { dg-final { scan-assembler-times "vshasigmad" 1 } } */
140 /* { dg-final { scan-assembler-times "vsubsbs" 1 } } vec_subs */
141 /* { dg-final { scan-assembler-times "vsububs" 1 } } vec_subs */
142 /* { dg-final { scan-assembler-times "vsubsws" 1 } } vec_subs */
143 /* { dg-final { scan-assembler-times "vsubuws" 1 } } vec_subs */
144 /* { dg-final { scan-assembler-times "vsubshs" 1 } } vec_subs */
145 /* { dg-final { scan-assembler-times "vsubuhs" 1 } } vec_subs */
146 /* { dg-final { scan-assembler-times "vsum2sws" 1 } } vec_sum2s */
147 /* { dg-final { scan-assembler-times "vsum4sws" 0 } } vec_sum4s */
148 /* { dg-final { scan-assembler-times "vsum4shs" 1 } } vec_sum4s */
149 /* { dg-final { scan-assembler-times "vsum4ubs" 1 } } vec_sum4s */
150