(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
powerpc/
mod-vectorize.c
       1  /* { dg-require-effective-target power10_ok } */
       2  /* { dg-options "-mdejagnu-cpu=power10 -O2 -ftree-vectorize -fno-vect-cost-model -fno-unroll-loops -fdump-tree-vect-details" } */
       3  
       4  /* Test vectorizer can exploit ISA 3.1 instructions Vector Modulo
       5     Signed/Unsigned Word/Doubleword for word/doubleword modulo operations.  */
       6  
       7  #define N 128
       8  
       9  extern signed int si_a[N], si_b[N], si_c[N];
      10  extern unsigned int ui_a[N], ui_b[N], ui_c[N];
      11  extern signed long long sd_a[N], sd_b[N], sd_c[N];
      12  extern unsigned long long ud_a[N], ud_b[N], ud_c[N];
      13  
      14  __attribute__ ((noipa)) void
      15  test_si ()
      16  {
      17    for (int i = 0; i < N; i++)
      18      si_c[i] = si_a[i] % si_b[i];
      19  }
      20  
      21  __attribute__ ((noipa)) void
      22  test_ui ()
      23  {
      24    for (int i = 0; i < N; i++)
      25      ui_c[i] = ui_a[i] % ui_b[i];
      26  }
      27  
      28  __attribute__ ((noipa)) void
      29  test_sd ()
      30  {
      31    for (int i = 0; i < N; i++)
      32      sd_c[i] = sd_a[i] % sd_b[i];
      33  }
      34  
      35  __attribute__ ((noipa)) void
      36  test_ud ()
      37  {
      38    for (int i = 0; i < N; i++)
      39      ud_c[i] = ud_a[i] % ud_b[i];
      40  }
      41  
      42  /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" } } */
      43  /* { dg-final { scan-assembler-times {\mvmodsw\M} 1 } } */
      44  /* { dg-final { scan-assembler-times {\mvmoduw\M} 1 } } */
      45  /* { dg-final { scan-assembler-times {\mvmodsd\M} 1 } } */
      46  /* { dg-final { scan-assembler-times {\mvmodud\M} 1 } } */