(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
powerpc/
fusion-p10-2logical.c
       1  /* { dg-do compile { target { powerpc*-*-* } } } */
       2  /* { dg-skip-if "" { powerpc*-*-darwin* } } */
       3  /* { dg-options "-mdejagnu-cpu=power10 -O3 -dp" } */
       4  
       5  #include <altivec.h>
       6  #include <stdint.h>
       7  
       8  /* and/andc/eqv/nand/nor/or/orc/xor */
       9  #define AND(a,b) ((a)&(b))
      10  #define ANDC1(a,b) ((a)&((~b)))
      11  #define ANDC2(a,b) ((~(a))&(b))
      12  #define EQV(a,b) (~((a)^(b)))
      13  #define NAND(a,b) (~((a)&(b)))
      14  #define NOR(a,b) (~((a)|(b)))
      15  #define OR(a,b) ((a)|(b))
      16  #define ORC1(a,b) ((a)|((~b)))
      17  #define ORC2(a,b) ((~(a))|(b))
      18  #define XOR(a,b) ((a)^(b))
      19  #define TEST1(type, func)							\
      20    type func ## _and_T_     ## type (type a, type b, type c) { return AND(func(a,b),c); } \
      21    type func ## _andc1_T_   ## type (type a, type b, type c) { return ANDC1(func(a,b),c); } \
      22    type func ## _andc2_T_   ## type (type a, type b, type c) { return ANDC2(func(a,b),c); } \
      23    type func ## _eqv_T_     ## type (type a, type b, type c) { return EQV(func(a,b),c); } \
      24    type func ## _nand_T_    ## type (type a, type b, type c) { return NAND(func(a,b),c); } \
      25    type func ## _nor_T_     ## type (type a, type b, type c) { return NOR(func(a,b),c); } \
      26    type func ## _or_T_      ## type (type a, type b, type c) { return OR(func(a,b),c); } \
      27    type func ## _orc1_T_    ## type (type a, type b, type c) { return ORC1(func(a,b),c); } \
      28    type func ## _orc2_T_    ## type (type a, type b, type c) { return ORC2(func(a,b),c); } \
      29    type func ## _xor_T_     ## type (type a, type b, type c) { return XOR(func(a,b),c); } \
      30    type func ## _rev_and_T_     ## type (type a, type b, type c) { return AND(c,func(a,b)); } \
      31    type func ## _rev_andc1_T_   ## type (type a, type b, type c) { return ANDC1(c,func(a,b)); } \
      32    type func ## _rev_andc2_T_   ## type (type a, type b, type c) { return ANDC2(c,func(a,b)); } \
      33    type func ## _rev_eqv_T_     ## type (type a, type b, type c) { return EQV(c,func(a,b)); } \
      34    type func ## _rev_nand_T_    ## type (type a, type b, type c) { return NAND(c,func(a,b)); } \
      35    type func ## _rev_nor_T_     ## type (type a, type b, type c) { return NOR(c,func(a,b)); } \
      36    type func ## _rev_or_T_      ## type (type a, type b, type c) { return OR(c,func(a,b)); } \
      37    type func ## _rev_orc1_T_    ## type (type a, type b, type c) { return ORC1(c,func(a,b)); } \
      38    type func ## _rev_orc2_T_    ## type (type a, type b, type c) { return ORC2(c,func(a,b)); } \
      39    type func ## _rev_xor_T_     ## type (type a, type b, type c) { return XOR(c,func(a,b)); }
      40  #define TEST(type)    \
      41    TEST1(type,AND)     \
      42    TEST1(type,ANDC1)   \
      43    TEST1(type,ANDC2)   \
      44    TEST1(type,EQV)     \
      45    TEST1(type,NAND)    \
      46    TEST1(type,NOR)     \
      47    TEST1(type,OR)      \
      48    TEST1(type,ORC1)    \
      49    TEST1(type,ORC2)    \
      50    TEST1(type,XOR)
      51  
      52  typedef vector bool char vboolchar_t;
      53  typedef vector unsigned int vuint_t;
      54  
      55  TEST(uint8_t);
      56  TEST(int8_t);
      57  TEST(uint16_t);
      58  TEST(int16_t);
      59  TEST(uint32_t);
      60  TEST(int32_t);
      61  TEST(uint64_t);
      62  TEST(int64_t);
      63  TEST(vboolchar_t);
      64  TEST(vuint_t);
      65  
      66  /* Recreate with:
      67     grep ' \*fuse_' fusion-p10-2logical.s|sed -e 's,^.*\*,,' -e 's,/[0-9],/,' |sort -k 7,7 |uniq -c|awk '{l=30-length($2); printf("/%s* { %s { scan-assembler-times {\\m%s\\M}%-*s        %4d { target lp64 } } } *%s/\n","","dg-final",$2,l,"",$1,"");}'
      68   */
      69  
      70  /* { dg-final { scan-assembler-times {\mfuse_and_and\M/}                           32 { target lp64 } } } */
      71  /* { dg-final { scan-assembler-times {\mfuse_andc_and\M/}                          96 { target lp64 } } } */
      72  /* { dg-final { scan-assembler-times {\mfuse_andc_or\M/}                           64 { target lp64 } } } */
      73  /* { dg-final { scan-assembler-times {\mfuse_andc_orc\M/}                          64 { target lp64 } } } */
      74  /* { dg-final { scan-assembler-times {\mfuse_andc_xor\M/}                          64 { target lp64 } } } */
      75  /* { dg-final { scan-assembler-times {\mfuse_and_eqv\M/}                           32 { target lp64 } } } */
      76  /* { dg-final { scan-assembler-times {\mfuse_and_or\M/}                            32 { target lp64 } } } */
      77  /* { dg-final { scan-assembler-times {\mfuse_and_orc\M/}                           32 { target lp64 } } } */
      78  /* { dg-final { scan-assembler-times {\mfuse_and_xor\M/}                           32 { target lp64 } } } */
      79  /* { dg-final { scan-assembler-times {\mfuse_eqv_and\M/}                           32 { target lp64 } } } */
      80  /* { dg-final { scan-assembler-times {\mfuse_eqv_andc\M/}                          32 { target lp64 } } } */
      81  /* { dg-final { scan-assembler-times {\mfuse_eqv_or\M/}                            32 { target lp64 } } } */
      82  /* { dg-final { scan-assembler-times {\mfuse_nand_and\M/}                          32 { target lp64 } } } */
      83  /* { dg-final { scan-assembler-times {\mfuse_nand_andc\M/}                         32 { target lp64 } } } */
      84  /* { dg-final { scan-assembler-times {\mfuse_nand_or\M/}                           96 { target lp64 } } } */
      85  /* { dg-final { scan-assembler-times {\mfuse_nand_orc\M/}                          32 { target lp64 } } } */
      86  /* { dg-final { scan-assembler-times {\mfuse_nor_and\M/}                           96 { target lp64 } } } */
      87  /* { dg-final { scan-assembler-times {\mfuse_nor_andc\M/}                          32 { target lp64 } } } */
      88  /* { dg-final { scan-assembler-times {\mfuse_nor_or\M/}                            32 { target lp64 } } } */
      89  /* { dg-final { scan-assembler-times {\mfuse_nor_orc\M/}                           32 { target lp64 } } } */
      90  /* { dg-final { scan-assembler-times {\mfuse_or_and\M/}                            32 { target lp64 } } } */
      91  /* { dg-final { scan-assembler-times {\mfuse_or_andc\M/}                           32 { target lp64 } } } */
      92  /* { dg-final { scan-assembler-times {\mfuse_orc_and\M/}                           64 { target lp64 } } } */
      93  /* { dg-final { scan-assembler-times {\mfuse_orc_andc\M/}                          64 { target lp64 } } } */
      94  /* { dg-final { scan-assembler-times {\mfuse_orc_or\M/}                            96 { target lp64 } } } */
      95  /* { dg-final { scan-assembler-times {\mfuse_orc_xor\M/}                           64 { target lp64 } } } */
      96  /* { dg-final { scan-assembler-times {\mfuse_or_eqv\M/}                            32 { target lp64 } } } */
      97  /* { dg-final { scan-assembler-times {\mfuse_or_or\M/}                             32 { target lp64 } } } */
      98  /* { dg-final { scan-assembler-times {\mfuse_or_xor\M/}                            32 { target lp64 } } } */
      99  /* { dg-final { scan-assembler-times {\mfuse_vandc_vand\M/}                        24 { target lp64 } } } */
     100  /* { dg-final { scan-assembler-times {\mfuse_vandc_vor\M/}                         16 { target lp64 } } } */
     101  /* { dg-final { scan-assembler-times {\mfuse_vandc_vorc\M/}                        16 { target lp64 } } } */
     102  /* { dg-final { scan-assembler-times {\mfuse_vandc_vxor\M/}                        16 { target lp64 } } } */
     103  /* { dg-final { scan-assembler-times {\mfuse_vand_vand\M/}                          8 { target lp64 } } } */
     104  /* { dg-final { scan-assembler-times {\mfuse_vand_veqv\M/}                          8 { target lp64 } } } */
     105  /* { dg-final { scan-assembler-times {\mfuse_vand_vor\M/}                           8 { target lp64 } } } */
     106  /* { dg-final { scan-assembler-times {\mfuse_vand_vorc\M/}                          8 { target lp64 } } } */
     107  /* { dg-final { scan-assembler-times {\mfuse_vand_vxor\M/}                          8 { target lp64 } } } */
     108  /* { dg-final { scan-assembler-times {\mfuse_veqv_vand\M/}                          8 { target lp64 } } } */
     109  /* { dg-final { scan-assembler-times {\mfuse_veqv_vandc\M/}                         8 { target lp64 } } } */
     110  /* { dg-final { scan-assembler-times {\mfuse_veqv_vor\M/}                           8 { target lp64 } } } */
     111  /* { dg-final { scan-assembler-times {\mfuse_vnand_vand\M/}                         8 { target lp64 } } } */
     112  /* { dg-final { scan-assembler-times {\mfuse_vnand_vandc\M/}                        8 { target lp64 } } } */
     113  /* { dg-final { scan-assembler-times {\mfuse_vnand_vor\M/}                         24 { target lp64 } } } */
     114  /* { dg-final { scan-assembler-times {\mfuse_vnand_vorc\M/}                         8 { target lp64 } } } */
     115  /* { dg-final { scan-assembler-times {\mfuse_vnor_vand\M/}                         24 { target lp64 } } } */
     116  /* { dg-final { scan-assembler-times {\mfuse_vnor_vandc\M/}                         8 { target lp64 } } } */
     117  /* { dg-final { scan-assembler-times {\mfuse_vnor_vor\M/}                           8 { target lp64 } } } */
     118  /* { dg-final { scan-assembler-times {\mfuse_vnor_vorc\M/}                          8 { target lp64 } } } */
     119  /* { dg-final { scan-assembler-times {\mfuse_vorc_vand\M/}                         16 { target lp64 } } } */
     120  /* { dg-final { scan-assembler-times {\mfuse_vorc_vandc\M/}                        16 { target lp64 } } } */
     121  /* { dg-final { scan-assembler-times {\mfuse_vorc_vor\M/}                          24 { target lp64 } } } */
     122  /* { dg-final { scan-assembler-times {\mfuse_vorc_vxor\M/}                         16 { target lp64 } } } */
     123  /* { dg-final { scan-assembler-times {\mfuse_vor_vand\M/}                           8 { target lp64 } } } */
     124  /* { dg-final { scan-assembler-times {\mfuse_vor_vandc\M/}                          8 { target lp64 } } } */
     125  /* { dg-final { scan-assembler-times {\mfuse_vor_veqv\M/}                           8 { target lp64 } } } */
     126  /* { dg-final { scan-assembler-times {\mfuse_vor_vor\M/}                            8 { target lp64 } } } */
     127  /* { dg-final { scan-assembler-times {\mfuse_vor_vxor\M/}                           8 { target lp64 } } } */
     128  /* { dg-final { scan-assembler-times {\mfuse_vxor_vand\M/}                          8 { target lp64 } } } */
     129  /* { dg-final { scan-assembler-times {\mfuse_vxor_vandc\M/}                         8 { target lp64 } } } */
     130  /* { dg-final { scan-assembler-times {\mfuse_vxor_veqv\M/}                          8 { target lp64 } } } */
     131  /* { dg-final { scan-assembler-times {\mfuse_vxor_vnand\M/}                         8 { target lp64 } } } */
     132  /* { dg-final { scan-assembler-times {\mfuse_vxor_vor\M/}                           8 { target lp64 } } } */
     133  /* { dg-final { scan-assembler-times {\mfuse_vxor_vorc\M/}                          8 { target lp64 } } } */
     134  /* { dg-final { scan-assembler-times {\mfuse_vxor_vxor\M/}                          8 { target lp64 } } } */
     135  /* { dg-final { scan-assembler-times {\mfuse_xor_and\M/}                           32 { target lp64 } } } */
     136  /* { dg-final { scan-assembler-times {\mfuse_xor_andc\M/}                          32 { target lp64 } } } */
     137  /* { dg-final { scan-assembler-times {\mfuse_xor_eqv\M/}                           32 { target lp64 } } } */
     138  /* { dg-final { scan-assembler-times {\mfuse_xor_nand\M/}                          32 { target lp64 } } } */
     139  /* { dg-final { scan-assembler-times {\mfuse_xor_or\M/}                            32 { target lp64 } } } */
     140  /* { dg-final { scan-assembler-times {\mfuse_xor_orc\M/}                           32 { target lp64 } } } */
     141  /* { dg-final { scan-assembler-times {\mfuse_xor_xor\M/}                           32 { target lp64 } } } */
     142  
     143  /* { dg-final { scan-assembler-times {\mfuse_and_and\M/}                           40 { target ilp32 } } } */
     144  /* { dg-final { scan-assembler-times {\mfuse_andc_and\M/}                         120 { target ilp32 } } } */
     145  /* { dg-final { scan-assembler-times {\mfuse_andc_or\M/}                           80 { target ilp32 } } } */
     146  /* { dg-final { scan-assembler-times {\mfuse_andc_orc\M/}                          80 { target ilp32 } } } */
     147  /* { dg-final { scan-assembler-times {\mfuse_andc_xor\M/}                          80 { target ilp32 } } } */
     148  /* { dg-final { scan-assembler-times {\mfuse_and_eqv\M/}                           40 { target ilp32 } } } */
     149  /* { dg-final { scan-assembler-times {\mfuse_and_or\M/}                            40 { target ilp32 } } } */
     150  /* { dg-final { scan-assembler-times {\mfuse_and_orc\M/}                           40 { target ilp32 } } } */
     151  /* { dg-final { scan-assembler-times {\mfuse_and_xor\M/}                           40 { target ilp32 } } } */
     152  /* { dg-final { scan-assembler-times {\mfuse_eqv_and\M/}                           40 { target ilp32 } } } */
     153  /* { dg-final { scan-assembler-times {\mfuse_eqv_andc\M/}                          40 { target ilp32 } } } */
     154  /* { dg-final { scan-assembler-times {\mfuse_eqv_or\M/}                            40 { target ilp32 } } } */
     155  /* { dg-final { scan-assembler-times {\mfuse_nand_and\M/}                          40 { target ilp32 } } } */
     156  /* { dg-final { scan-assembler-times {\mfuse_nand_andc\M/}                         40 { target ilp32 } } } */
     157  /* { dg-final { scan-assembler-times {\mfuse_nand_or\M/}                          120 { target ilp32 } } } */
     158  /* { dg-final { scan-assembler-times {\mfuse_nand_orc\M/}                          40 { target ilp32 } } } */
     159  /* { dg-final { scan-assembler-times {\mfuse_nor_and\M/}                          120 { target ilp32 } } } */
     160  /* { dg-final { scan-assembler-times {\mfuse_nor_andc\M/}                          40 { target ilp32 } } } */
     161  /* { dg-final { scan-assembler-times {\mfuse_nor_or\M/}                            40 { target ilp32 } } } */
     162  /* { dg-final { scan-assembler-times {\mfuse_nor_orc\M/}                           40 { target ilp32 } } } */
     163  /* { dg-final { scan-assembler-times {\mfuse_or_and\M/}                            40 { target ilp32 } } } */
     164  /* { dg-final { scan-assembler-times {\mfuse_or_andc\M/}                           40 { target ilp32 } } } */
     165  /* { dg-final { scan-assembler-times {\mfuse_orc_and\M/}                           80 { target ilp32 } } } */
     166  /* { dg-final { scan-assembler-times {\mfuse_orc_andc\M/}                          80 { target ilp32 } } } */
     167  /* { dg-final { scan-assembler-times {\mfuse_orc_or\M/}                           120 { target ilp32 } } } */
     168  /* { dg-final { scan-assembler-times {\mfuse_orc_xor\M/}                           80 { target ilp32 } } } */
     169  /* { dg-final { scan-assembler-times {\mfuse_or_eqv\M/}                            40 { target ilp32 } } } */
     170  /* { dg-final { scan-assembler-times {\mfuse_or_or\M/}                             40 { target ilp32 } } } */
     171  /* { dg-final { scan-assembler-times {\mfuse_or_xor\M/}                            40 { target ilp32 } } } */
     172  /* { dg-final { scan-assembler-times {\mfuse_vandc_vand\M/}                        24 { target ilp32 } } } */
     173  /* { dg-final { scan-assembler-times {\mfuse_vandc_vor\M/}                         16 { target ilp32 } } } */
     174  /* { dg-final { scan-assembler-times {\mfuse_vandc_vorc\M/}                        16 { target ilp32 } } } */
     175  /* { dg-final { scan-assembler-times {\mfuse_vandc_vxor\M/}                        16 { target ilp32 } } } */
     176  /* { dg-final { scan-assembler-times {\mfuse_vand_vand\M/}                          8 { target ilp32 } } } */
     177  /* { dg-final { scan-assembler-times {\mfuse_vand_veqv\M/}                          8 { target ilp32 } } } */
     178  /* { dg-final { scan-assembler-times {\mfuse_vand_vor\M/}                           8 { target ilp32 } } } */
     179  /* { dg-final { scan-assembler-times {\mfuse_vand_vorc\M/}                          8 { target ilp32 } } } */
     180  /* { dg-final { scan-assembler-times {\mfuse_vand_vxor\M/}                          8 { target ilp32 } } } */
     181  /* { dg-final { scan-assembler-times {\mfuse_veqv_vand\M/}                          8 { target ilp32 } } } */
     182  /* { dg-final { scan-assembler-times {\mfuse_veqv_vandc\M/}                         8 { target ilp32 } } } */
     183  /* { dg-final { scan-assembler-times {\mfuse_veqv_vor\M/}                           8 { target ilp32 } } } */
     184  /* { dg-final { scan-assembler-times {\mfuse_vnand_vand\M/}                         8 { target ilp32 } } } */
     185  /* { dg-final { scan-assembler-times {\mfuse_vnand_vandc\M/}                        8 { target ilp32 } } } */
     186  /* { dg-final { scan-assembler-times {\mfuse_vnand_vor\M/}                         24 { target ilp32 } } } */
     187  /* { dg-final { scan-assembler-times {\mfuse_vnand_vorc\M/}                         8 { target ilp32 } } } */
     188  /* { dg-final { scan-assembler-times {\mfuse_vnor_vand\M/}                         24 { target ilp32 } } } */
     189  /* { dg-final { scan-assembler-times {\mfuse_vnor_vandc\M/}                         8 { target ilp32 } } } */
     190  /* { dg-final { scan-assembler-times {\mfuse_vnor_vor\M/}                           8 { target ilp32 } } } */
     191  /* { dg-final { scan-assembler-times {\mfuse_vnor_vorc\M/}                          8 { target ilp32 } } } */
     192  /* { dg-final { scan-assembler-times {\mfuse_vorc_vand\M/}                         16 { target ilp32 } } } */
     193  /* { dg-final { scan-assembler-times {\mfuse_vorc_vandc\M/}                        16 { target ilp32 } } } */
     194  /* { dg-final { scan-assembler-times {\mfuse_vorc_vor\M/}                          24 { target ilp32 } } } */
     195  /* { dg-final { scan-assembler-times {\mfuse_vorc_vxor\M/}                         16 { target ilp32 } } } */
     196  /* { dg-final { scan-assembler-times {\mfuse_vor_vand\M/}                           8 { target ilp32 } } } */
     197  /* { dg-final { scan-assembler-times {\mfuse_vor_vandc\M/}                          8 { target ilp32 } } } */
     198  /* { dg-final { scan-assembler-times {\mfuse_vor_veqv\M/}                           8 { target ilp32 } } } */
     199  /* { dg-final { scan-assembler-times {\mfuse_vor_vor\M/}                            8 { target ilp32 } } } */
     200  /* { dg-final { scan-assembler-times {\mfuse_vor_vxor\M/}                           8 { target ilp32 } } } */
     201  /* { dg-final { scan-assembler-times {\mfuse_vxor_vand\M/}                          8 { target ilp32 } } } */
     202  /* { dg-final { scan-assembler-times {\mfuse_vxor_vandc\M/}                         8 { target ilp32 } } } */
     203  /* { dg-final { scan-assembler-times {\mfuse_vxor_veqv\M/}                          8 { target ilp32 } } } */
     204  /* { dg-final { scan-assembler-times {\mfuse_vxor_vnand\M/}                         8 { target ilp32 } } } */
     205  /* { dg-final { scan-assembler-times {\mfuse_vxor_vor\M/}                           8 { target ilp32 } } } */
     206  /* { dg-final { scan-assembler-times {\mfuse_vxor_vorc\M/}                          8 { target ilp32 } } } */
     207  /* { dg-final { scan-assembler-times {\mfuse_vxor_vxor\M/}                          8 { target ilp32 } } } */
     208  /* { dg-final { scan-assembler-times {\mfuse_xor_and\M/}                           40 { target ilp32 } } } */
     209  /* { dg-final { scan-assembler-times {\mfuse_xor_andc\M/}                          40 { target ilp32 } } } */
     210  /* { dg-final { scan-assembler-times {\mfuse_xor_eqv\M/}                           40 { target ilp32 } } } */
     211  /* { dg-final { scan-assembler-times {\mfuse_xor_nand\M/}                          40 { target ilp32 } } } */
     212  /* { dg-final { scan-assembler-times {\mfuse_xor_or\M/}                            40 { target ilp32 } } } */
     213  /* { dg-final { scan-assembler-times {\mfuse_xor_orc\M/}                           40 { target ilp32 } } } */
     214  /* { dg-final { scan-assembler-times {\mfuse_xor_xor\M/}                           40 { target ilp32 } } } */