1  /* Verify that overloaded built-ins for vec_splat with short
       2     inputs produce the right results.  */
       3  
       4  /* { dg-do compile } */
       5  /* { dg-require-effective-target powerpc_altivec_ok } */
       6  /* { dg-options "-maltivec -O2" } */
       7  
       8  #include <altivec.h>
       9  
      10  vector bool short testb_00 (vector bool short x) { return vec_splat (x, 0b00000); }
      11  vector bool short testb_01 (vector bool short x) { return vec_splat (x, 0b00001); }
      12  vector bool short testb_02 (vector bool short x) { return vec_splat (x, 0b00010); }
      13  vector bool short testb_04 (vector bool short x) { return vec_splat (x, 0b00100); }
      14  
      15  vector signed short tests_00 (vector signed short x) { return vec_splat (x, 0b00000); }
      16  vector signed short tests_01 (vector signed short x) { return vec_splat (x, 0b00001); }
      17  vector signed short tests_02 (vector signed short x) { return vec_splat (x, 0b00010); }
      18  vector signed short tests_04 (vector signed short x) { return vec_splat (x, 0b00100); }
      19  
      20  vector unsigned short testu_00 (vector unsigned short x) { return vec_splat (x, 0b00000); }
      21  vector unsigned short testu_01 (vector unsigned short x) { return vec_splat (x, 0b00001); }
      22  vector unsigned short testu_02 (vector unsigned short x) { return vec_splat (x, 0b00010); }
      23  vector unsigned short testu_04 (vector unsigned short x) { return vec_splat (x, 0b00100); }
      24  
      25  /* Similar test as above, but the source vector is a known constant. */
      26  vector bool short test_bs () { const vector bool short y = {1, 2, 3, 4, 5, 6, 7, 8}; return vec_splat (y, 0b00010); }
      27  vector signed short test_ss () { const vector signed short y = {1, 2, 3, 4, 5, 6, 7, 8}; return vec_splat (y, 0b00010); }
      28  vector unsigned short test_us () { const vector unsigned short y = {1, 2, 3, 4, 5, 6, 7, 8}; return vec_splat (y, 0b00010); }
      29  
      30  /* { dg-final { scan-assembler-times "vspltish" 3 } } */
      31  /* { dg-final { scan-assembler-times "vsplth" 12 } } */