1  /* Verify that overloaded built-ins for vec_sl with char
       2     inputs produce the right results.  */
       3  
       4  /* { dg-do compile } */
       5  /* { dg-require-effective-target powerpc_altivec_ok } */
       6  /* { dg-options "-maltivec -O2" } */
       7  
       8  #include <altivec.h>
       9  
      10  //# vec_sl  - shift left
      11  //# vec_sr  - shift right
      12  //# vec_sra - shift right algebraic
      13  //# vec_rl  - rotate left
      14  
      15  vector signed char
      16  testsl_signed (vector signed char x, vector unsigned char y)
      17  {
      18    return vec_sl (x, y);
      19  }
      20  
      21  vector unsigned char
      22  testsl_unsigned (vector unsigned char x, vector unsigned char y)
      23  {
      24    return vec_sl (x, y);
      25  }
      26  
      27  vector signed char
      28  testsr_signed (vector signed char x, vector unsigned char y)
      29  {
      30    return vec_sr (x, y);
      31  }
      32  
      33  vector unsigned char
      34  testsr_unsigned (vector unsigned char x, vector unsigned char y)
      35  {
      36    return vec_sr (x, y);
      37  }
      38  
      39  vector signed char
      40  testsra_signed (vector signed char x, vector unsigned char y)
      41  {
      42    return vec_sra (x, y);
      43  }
      44  
      45  vector unsigned char
      46  testsra_unsigned (vector unsigned char x, vector unsigned char y)
      47  {
      48    return vec_sra (x, y);
      49  }
      50  
      51  vector signed char
      52  testrl_signed (vector signed char x, vector unsigned char y)
      53  {
      54    return vec_rl (x, y);
      55  }
      56  
      57  vector unsigned char
      58  testrl_unsigned (vector unsigned char x, vector unsigned char y)
      59  {
      60    return vec_rl (x, y);
      61  }
      62  
      63  /* { dg-final { scan-assembler-times "vslb" 2 } } */
      64  /* { dg-final { scan-assembler-times "vsrb" 2 } } */
      65  /* { dg-final { scan-assembler-times "vsrab" 2 } } */
      66  /* { dg-final { scan-assembler-times "vrlb" 2 } } */