1  /* Verify that overloaded built-ins for vec_insert with float
       2     inputs produce the right codegen.  Power8 variant.  */
       3  
       4  /* { dg-do compile } */
       5  /* { dg-require-effective-target powerpc_p8vector_ok } */
       6  /* { dg-options "-O2 -mdejagnu-cpu=power8" } */
       7  
       8  #include <altivec.h>
       9  
      10  vector float
      11  testf_var (float f, vector float vf, signed int i)
      12  {
      13    return vec_insert (f, vf, i);
      14  }
      15  
      16  vector float
      17  testf_cst (float f, vector float vf)
      18  {
      19    return vec_insert (f, vf, 12);
      20  }
      21  
      22  /* { dg-final { scan-assembler-times {\mstvx\M|\mstxv\M|\mstxvd2x\M} 0 { target lp64 } } } */
      23  /* cst tests has stfs instead of stfsx. */
      24  /* { dg-final { scan-assembler-times {\mstfs\M|\mstfsx\M} 1 { target lp64 } } } */
      25  /* { dg-final { scan-assembler-times {\mlvx\M|\mlxv\M|\mlxvd2x\M|\mlxvw4x\M} 2 } } */
      26  
      27  /* cst test has a lvewx,vperm combo */
      28  /* { dg-final { scan-assembler-times {\mlvewx\M} 1 } } */
      29  /* { dg-final { scan-assembler-times {\mvperm\M} 3 { target lp64 } } } */
      30  
      31  /* -m32 codegen. */
      32  /* { dg-final { scan-assembler-times {\mstvx\M|\mstxv\M|\mstxvd2x\M} 0 { target ilp32 } } } */
      33  /* { dg-final { scan-assembler-times {\mstfs\M|\mstfsx\M} 2 { target ilp32 } } } */
      34  /* { dg-final { scan-assembler-times {\mvperm\M} 3 { target ilp32 } } } */
      35  
      36