1 /* Verify that overloaded built-ins for vec_cmp with long long
2 inputs produce the right code. */
3
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_p8vector_ok } */
6 /* { dg-options "-mpower8-vector -O2" } */
7
8 #include <altivec.h>
9
10 vector bool long long
11 test3_eq (vector signed long long x, vector signed long long y)
12 {
13 return vec_cmpeq (x, y);
14 }
15
16 vector bool long long
17 test6_eq (vector unsigned long long x, vector unsigned long long y)
18 {
19 return vec_cmpeq (x, y);
20 }
21
22 vector bool long long
23 test3_ge (vector signed long long x, vector signed long long y)
24 {
25 return vec_cmpge (x, y);
26 }
27
28 vector bool long long
29 test6_ge (vector unsigned long long x, vector unsigned long long y)
30 {
31 return vec_cmpge (x, y);
32 }
33
34 vector bool long long
35 test3_gt (vector signed long long x, vector signed long long y)
36 {
37 return vec_cmpgt (x, y);
38 }
39
40 vector bool long long
41 test6_gt (vector unsigned long long x, vector unsigned long long y)
42 {
43 return vec_cmpgt (x, y);
44 }
45
46 vector bool long long
47 test3_le (vector signed long long x, vector signed long long y)
48 {
49 return vec_cmple (x, y);
50 }
51
52 vector bool long long
53 test6_le (vector unsigned long long x, vector unsigned long long y)
54 {
55 return vec_cmple (x, y);
56 }
57
58 vector bool long long
59 test3_lt (vector signed long long x, vector signed long long y)
60 {
61 return vec_cmplt (x, y);
62 }
63
64 vector bool long long
65 test6_lt (vector unsigned long long x, vector unsigned long long y)
66 {
67 return vec_cmplt (x, y);
68 }
69
70 vector bool long long
71 test3_ne (vector signed long long x, vector signed long long y)
72 {
73 return vec_cmpne (x, y);
74 }
75
76 vector bool long long
77 test6_ne (vector unsigned long long x, vector unsigned long long y)
78 {
79 return vec_cmpne (x, y);
80 }
81
82 /* { dg-final { scan-assembler-times "vcmpequd" 4 } } */
83 /* { dg-final { scan-assembler-times "vcmpgtsd" 4 } } */
84 /* { dg-final { scan-assembler-times "vcmpgtud" 4 } } */
85 /* { dg-final { scan-assembler-times "xxlnor" 6 } } */
86