1  /* { dg-do compile { target { powerpc*-*-linux* } } } */
       2  /* { dg-require-effective-target powerpc_float128_sw_ok } */
       3  /* { dg-options "-O2 -mdejagnu-cpu=power7 -mfloat128 -mno-regnames" } */
       4  
       5  #ifndef __FLOAT128__
       6  #error "-mfloat128 is not supported."
       7  #endif
       8  
       9  /* Pick a constant to load that cannot be generated by the power10 lxvkq
      10     instruction.  */
      11  #ifdef __LONG_DOUBLE_IEEE128__
      12  #define TYPE long double
      13  #define TEN  10.0L
      14  
      15  #else
      16  #define TYPE __float128
      17  #define TEN  10.0Q
      18  #endif
      19  
      20  /* Test to make sure vector registers are used for passing IEEE 128-bit
      21     floating point values and returning them. Also make sure the 'q' suffix is
      22     handled for __float128.  */
      23  TYPE one (void) { return TEN; }
      24  void store (TYPE a, TYPE *p) { *p = a; }
      25  
      26  /* This regexp captures the different vector load/stores that can be generated:
      27  
      28  	lxvd2x	-- big endian power7/power8, little endian power8
      29  	lvx	-- Altivec
      30  	lxv	-- D-form power9
      31  	lxvx	-- X-form power9
      32  	plxv	-- prefixed power10
      33  	stxvd2x	-- big endian power7/power8, little endian power8
      34  	stvx	-- Altivec
      35  	stxvx	-- X-form vector store (power9/power10).
      36  	stv	-- D-form vector store (power9 and above).
      37  	pstv	-- prefixed vector store (power10 and above).  */
      38  
      39  /* { dg-final { scan-assembler {\mlxvd2x 34\M|\mlvx 2\M|\mp?lxvx? 34\M} } } */
      40  /* { dg-final { scan-assembler {\mstxvd2x 34\M|\mstvx 2\M|\mp?stxvx? 34\M} } } */