1 /* { dg-do compile } */
2 /* { dg-require-effective-target powerpc_vsx_ok } */
3 /* { dg-options "-mvsx" } */
4
5 #include <altivec.h>
6
7 vector double
8 test_shift_left_double (vector double x, vector double y)
9 {
10 return vec_sld (x, y, /* shift_by */ 10);
11 }
12
13 vector float
14 test_nabs_float (vector float x)
15 {
16 return vec_nabs (x);
17 }
18
19 vector double
20 test_nabs_double (vector double x)
21 {
22 return vec_nabs (x);
23 }
24
25 vector bool long long
26 test_sll_vbll_vbll_vuc (vector bool long long x,
27 vector unsigned char y)
28 {
29 return vec_sll (x, y);
30 }
31
32 vector bool long long
33 test_sll_vbll_vbll_vull (vector bool long long x,
34 vector unsigned long long y)
35 {
36 return vec_sll (x, y);
37 }
38
39 vector bool long long
40 test_sll_vbll_vbll_vus (vector bool long long x,
41 vector unsigned short y)
42 {
43 return vec_sll (x, y);
44 }
45
46 vector signed long long
47 test_slo_vsll_slo_vsll_vsc (vector signed long long x, vector signed char y)
48 {
49 return vec_slo (x, y);
50 }
51
52 vector signed long long
53 test_slo_vsll_slo_vsll_vuc (vector signed long long x, vector unsigned char y)
54 {
55 return vec_slo (x, y);
56 }
57
58 vector unsigned long long
59 test_slo_vull_slo_vull_vsc (vector unsigned long long x, vector signed char y)
60 {
61 return vec_slo (x, y);
62 }
63
64 vector unsigned long long
65 test_slo_vull_slo_vull_vuc (vector unsigned long long x,
66 vector unsigned char y)
67 {
68 return vec_slo (x, y);
69 }
70
71 vector signed char
72 test_vsc_sldw_vsc_vsc (vector signed char x, vector signed char y)
73 {
74 return vec_sldw (x, y, 1);
75 }
76
77 vector unsigned char
78 test_vuc_sldw_vuc_vuc (vector unsigned char x, vector unsigned char y)
79 {
80 return vec_sldw (x, y, 3);
81 }
82
83 vector signed short int
84 test_vssi_sldw_vssi_vssi (vector signed short int x,
85 vector signed short int y)
86 {
87 return vec_sldw (x, y, 1);
88 }
89
90 vector unsigned short int
91 test_vusi_sldw_vusi_vusi (vector unsigned short int x,
92 vector unsigned short int y)
93 {
94 return vec_sldw (x, y, 3);
95 }
96
97 vector signed int
98 test_vsi_sldw_vsi_vsi (vector signed int x, vector signed int y)
99 {
100 return vec_sldw (x, y, 1);
101 }
102
103 vector unsigned int
104 test_vui_sldw_vui_vui (vector unsigned int x, vector unsigned int y)
105 {
106 return vec_sldw (x, y, 3);
107 }
108
109 vector signed long long
110 test_vsl_sldw_vsl_vsl (vector signed long long x, vector signed long long y)
111 {
112 return vec_sldw (x, y, 1);
113 }
114
115 vector unsigned long long
116 test_vul_sldw_vul_vul (vector unsigned long long x,
117 vector unsigned long long y)
118 {
119 return vec_sldw (x, y, 3);
120 }
121
122 vector float
123 test_vf_sldw_vf_vf (vector float x, vector float y)
124 {
125 return vec_sldw (x, y, 3);
126 }
127
128 vector double
129 test_vd_sldw_vd_vd (vector double x, vector double y)
130 {
131 return vec_sldw (x, y, 1);
132 }
133
134 vector signed int long long
135 test_sll_vsill_vsill_vuc (vector signed long long int x,
136 vector unsigned char y)
137 {
138 return vec_sll (x, y);
139 }
140
141 vector unsigned int long long
142 test_sll_vuill_vuill_vuc (vector unsigned long long int x,
143 vector unsigned char y)
144 {
145 return vec_sll (x, y);
146 }
147
148
149 /* Expected test results:
150
151 test_shift_left_double 1 vsldoi
152 test_nabs_float 1 xvnabssp
153 test_nabs_double 1 xvnabsdp
154 test_sll_vbll_vbll_vuc 1 vsl
155 test_sll_vbll_vbll_vull 1 vsl
156 test_sll_vbll_vbll_vus 1 vsl
157 test_slo_vsll_slo_vsll_vsc 1 vslo
158 test_slo_vsll_slo_vsll_vuc 1 vslo
159 test_slo_vull_slo_vull_vsc 1 vslo
160 test_slo_vull_slo_vull_vuc 1 vslo
161 test_vsc_sldw_vsc_vsc 1 xxlor, 1 xxsldwi
162 test_vuc_sldw_vuc_vuc 1 xxlor, 1 xxsldwi
163 test_vssi_sldw_vssi_vssi 1 xxlor, 1 xxsldwi
164 test_vusi_sldw_vusi_vusi 1 xxlor, 1 xxsldwi
165 test_vsi_sldw_vsi_vsi 1 xxlor, 1 xxsldwi
166 test_vui_sldw_vui_vui 1 xxlor, 1 xxsldwi
167 test_vsl_sldw_vsl_vsl 1 xxlor, 1 xxsldwi
168 test_vul_sldw_vul_vul 1 xxlor, 1 xxsldwi
169 test_vf_sldw_vf_vf 1 xxlor, 1 xxsldwi
170 test_vd_sldw_vd_vd 1 xxlor, 1 xxsldwi
171 test_sll_vsill_vsill_vuc 1 vsl
172 test_sll_vuill_vuill_vuc 1 vsl */
173
174 /* { dg-final { scan-assembler-times "vsldoi" 1 } } */
175 /* { dg-final { scan-assembler-times "xvnabssp" 1 } } */
176 /* { dg-final { scan-assembler-times "xvnabsdp" 1 } } */
177 /* { dg-final { scan-assembler-times "vslo" 4 } } */
178 /* { dg-final { scan-assembler-times "xxlor" 32 } } */
179 /* { dg-final { scan-assembler-times {\mvsl\M} 5 } } */
180 /* { dg-final { scan-assembler-times {\mxxsldwi\M} 10 } } */