1  /* { dg-do compile } */
       2  /* { dg-options "-O3 -maltivec -mvsx" } */
       3  /* { dg-require-effective-target lp64 } */
       4  
       5  #define NO_WARN_X86_INTRINSICS 1
       6  #include <x86intrin.h>
       7  
       8  unsigned long long
       9  test__bzhi_u64_group (unsigned long long a)
      10  {
      11    /* bzhi is implemented in source as shift left then shift right
      12     to clear the high order bits.
      13     For the case where the starting index is const, the compiler
      14     should reduces this to a single Rotate Left Doubleword
      15     Immediate then Clear Left (rldicl) instruction.  */
      16    unsigned long long res;
      17    res = _bzhi_u64 (a, 8);
      18    res += _bzhi_u64 (a, 16);
      19    res += _bzhi_u64 (a, 24);
      20    res += _bzhi_u64 (a, 32);
      21    res += _bzhi_u64 (a, 40);
      22    res += _bzhi_u64 (a, 48);
      23    return (res);
      24  }
      25  /* the resulting assembler should have 6 X rldicl and no sld or
      26     srd instructions.  */
      27  
      28  /* { dg-final { scan-assembler-times "rldicl" 6 } } */
      29  /* { dg-final { scan-assembler-not "sld" } } */
      30  /* { dg-final { scan-assembler-not "srd" } } */