(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
nios2/
lo-addr-char.c
       1  /* { dg-do compile } */
       2  /* { dg-options "-O2" } */
       3  /* { dg-final { scan-assembler-times "addi\tr., r., %lo" 4 } } */
       4  /* { dg-final { scan-assembler-times "ldbu\tr., %lo" 4 } } */
       5  /* { dg-final { scan-assembler-times "ldb\tr., %lo" 16 } } */
       6  /* { dg-final { scan-assembler-times "stb\tr., %lo" 4 } } */
       7  
       8  /* Check that various address forms involving a symbolic constant
       9     with a possible constant offset and/or index register are optimized
      10     to generate a %lo relocation in the load/store instructions instead
      11     of a plain register indirect addressing mode.  */
      12  /* Note: get* uses ldhu but ext* uses ldh since TYPE is signed.  */
      13  
      14  #define TYPE signed char
      15  
      16  struct ss
      17  {
      18    TYPE x1,x2;
      19  };
      20  
      21  extern TYPE S1;
      22  extern TYPE S2[];
      23  
      24  extern struct ss S3;
      25  extern struct ss S4[];
      26  
      27  TYPE *addr1 (void) { return &S1; }
      28  TYPE get1 (void) { return S1; }
      29  void set1 (TYPE value) { S1 = value; }
      30  
      31  TYPE *addr2 (int i) { return &(S2[i]); }
      32  TYPE get2 (int i) { return S2[i]; }
      33  void set2 (int i, TYPE value) { S2[i] = value; }
      34  
      35  TYPE *addr3 (void) { return &(S3.x2); }
      36  TYPE get3 (void) { return S3.x2; }
      37  void set3 (TYPE value) { S3.x2 = value; }
      38  
      39  TYPE *addr4 (int i) { return &(S4[i].x2); }
      40  TYPE get4 (int i) { return S4[i].x2; }
      41  void set4 (int i, TYPE value) { S4[i].x2 = value; }
      42  
      43  int extw1 (void) { return (int)(S1); }
      44  int extw2 (int i) { return (int)(S2[i]); }
      45  int extw3 (void) { return (int)(S3.x2); }
      46  int extw4 (int i) { return (int)(S4[i].x2); }
      47  unsigned int extwu1 (void) { return (unsigned int)(S1); }
      48  unsigned int extwu2 (int i) { return (unsigned int)(S2[i]); }
      49  unsigned int extwu3 (void) { return (unsigned int)(S3.x2); }
      50  unsigned int extwu4 (int i) { return (unsigned int)(S4[i].x2); }
      51  
      52  short exth1 (void) { return (short)(S1); }
      53  short exth2 (int i) { return (short)(S2[i]); }
      54  short exth3 (void) { return (short)(S3.x2); }
      55  short exth4 (int i) { return (short)(S4[i].x2); }
      56  unsigned short exthu1 (void) { return (unsigned short)(S1); }
      57  unsigned short exthu2 (int i) { return (unsigned short)(S2[i]); }
      58  unsigned short exthu3 (void) { return (unsigned short)(S3.x2); }
      59  unsigned short exthu4 (int i) { return (unsigned short)(S4[i].x2); }
      60