1  /* { dg-options "-mr10k-cache-barrier=store -mno-abicalls" } */
       2  
       3  void bar1 (void);
       4  void bar2 (void);
       5  void bar3 (void);
       6  
       7  NOMIPS16 void
       8  foo (int *x, int sel, int n)
       9  {
      10    if (sel)
      11      {
      12        bar1 ();
      13        x[0] = 1;
      14      }
      15    else
      16      {
      17        bar2 ();
      18        x[1] = 0;
      19      }
      20    /* If there is one copy of this code, reached by two unconditional edges,
      21       then it shouldn't need a third cache barrier.  */
      22    x[2] = 2;
      23    while (n--)
      24      bar3 ();
      25  }
      26  
      27  /* { dg-final { scan-assembler-times "\tcache\t" 2 } } */