1  /* { dg-options "-mabi=64 -mr10k-cache-barrier=store" } */
       2  
       3  /* Test that stores to uncached addresses do not get unnecessary
       4     cache barriers.  */
       5  
       6  #define TEST(ADDR)					\
       7    NOMIPS16 void						\
       8    test_##ADDR (int n)					\
       9    {							\
      10      while (n--)						\
      11        {							\
      12  	*(volatile char *) (0x##ADDR##UL) = 1;		\
      13  	*(volatile short *) (0x##ADDR##UL + 2) = 2;	\
      14  	*(volatile int *) (0x##ADDR##UL + 4) = 0;	\
      15        }							\
      16    }
      17  
      18  TEST (9000000000000000)
      19  TEST (900000fffffffff8)
      20  
      21  TEST (9200000000000000)
      22  TEST (920000fffffffff8)
      23  
      24  TEST (9400000000000000)
      25  TEST (940000fffffffff8)
      26  
      27  TEST (9600000000000000)
      28  TEST (960000fffffffff8)
      29  
      30  TEST (b800000000000000)
      31  TEST (b80000fffffffff8)
      32  
      33  TEST (ba00000000000000)
      34  TEST (ba0000fffffffff8)
      35  
      36  TEST (bc00000000000000)
      37  TEST (bc0000fffffffff8)
      38  
      39  TEST (be00000000000000)
      40  TEST (be0000fffffffff8)
      41  
      42  TEST (ffffffffa0000000)
      43  TEST (ffffffffbffffff8)
      44  
      45  /* { dg-final { scan-assembler-not "\tcache\t" } } */