1  /* { dg-do compile } */
       2  /* { dg-require-effective-target fpic } */
       3  /* { dg-require-effective-target ia32 } */
       4  /* { dg-options "-O2 -fPIC" } */
       5  typedef unsigned int size_t;
       6   char *
       7  __mempcpy_by2 (char *__dest, __const char *__src, size_t __srclen)
       8  {
       9    register char *__tmp = __dest;
      10    register unsigned long int __d0, __d1;
      11    __asm__ __volatile__
      12      (
      13       "shrl      $1,%3\n\t"
      14       "jz        2f\n"
      15       "1:\n\t"
      16       "movl      (%2),%0\n\t"
      17       "leal      4(%2),%2\n\t"
      18       "movl      %0,(%1)\n\t"
      19       "leal      4(%1),%1\n\t"
      20       "decl      %3\n\t"
      21       "jnz       1b\n"
      22       "2:\n\t"
      23       "movw      (%2),%w0\n\t"
      24       "movw      %w0,(%1)"
      25       : "=&q" (__d0), "=r" (__tmp), "=&r" (__src), "=&r" (__d1),
      26         "=m" ( *(struct { __extension__ char __x[__srclen]; } *)__dest)
      27       : "1" (__tmp), "2" (__src), "3" (__srclen / 2),
      28         "m" ( *(struct { __extension__ char __x[__srclen]; } *)__src)
      29       : "cc");
      30    return __tmp + 2;
      31  }