1  /* { dg-do run { target avx512fp16 } } */
       2  /* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
       3  
       4  
       5  #define AVX512FP16
       6  #include "avx512fp16-helper.h"
       7  
       8  #define N_ELEMS (AVX512F_LEN / 64)
       9  
      10  void NOINLINE
      11  EMULATE(cvtq2_ph) (V512 * dest, V512 op1, int n_el,
      12  		 __mmask32 k, int zero_mask)
      13  {
      14    V512 v1, v2, v3, v4, v5, v6, v7, v8;
      15    int i;
      16    __mmask16 m1, m2;
      17  
      18    m1 = k & 0xffff;
      19  
      20    unpack_ph_2twops(*dest, &v7, &v8);
      21  
      22    for (i = 0; i < n_el; i++) {
      23        if (((1 << i) & m1) == 0) {
      24  	  if (zero_mask) {
      25  	      v5.f32[i] = 0;
      26  	  }
      27  	  else {
      28  	      v5.u32[i] = v7.u32[i];
      29  	  }
      30        }
      31        else {
      32  	  v5.f32[i] = op1.u64[i];
      33        }
      34    }
      35  
      36    // The left part should be zero
      37    for (i = n_el; i < 16; i++)
      38      v5.f32[i] = 0;
      39  
      40    *dest = pack_twops_2ph(v5, v5);
      41  }
      42  
      43  void
      44  TEST (void)
      45  {
      46    V512 res;
      47    V512 exp;
      48  
      49    init_src();
      50  
      51    EMULATE(cvtq2_ph)(&exp, src3, N_ELEMS, NET_MASK, 0);
      52    res.xmmh[0] = INTRINSIC (_cvtepu64_ph) (SI(src3));
      53    CHECK_RESULT (&res, &exp, 8, _cvtepu64_ph);
      54  
      55    init_dest(&res, &exp);
      56    EMULATE(cvtq2_ph)(&exp, src3, N_ELEMS, 0xcc, 0);
      57    res.xmmh[0] = INTRINSIC (_mask_cvtepu64_ph) (res.xmmh[0], 0xcc, SI(src3));
      58    CHECK_RESULT (&res, &exp, 8, _mask_cvtepu64_ph);
      59  
      60    EMULATE(cvtq2_ph)(&exp, src3, N_ELEMS, 0xc1, 1);
      61    res.xmmh[0] = INTRINSIC (_maskz_cvtepu64_ph) (0xc1, SI(src3));
      62    CHECK_RESULT (&res, &exp, 8, _maskz_cvtepu64_ph);
      63  
      64  #if AVX512F_LEN == 512
      65    EMULATE(cvtq2_ph)(&exp, src3, N_ELEMS, NET_MASK, 0);
      66    res.xmmh[0] = INTRINSIC (_cvt_roundepu64_ph) (SI(src3), _ROUND_NINT);
      67    CHECK_RESULT (&res, &exp, 8, _cvt_roundepu64_ph);
      68  
      69    init_dest(&res, &exp);
      70    EMULATE(cvtq2_ph)(&exp, src3, N_ELEMS, 0xcc, 0);
      71    res.xmmh[0] = INTRINSIC (_mask_cvt_roundepu64_ph) (res.xmmh[0], 0xcc, SI(src3), _ROUND_NINT);
      72    CHECK_RESULT (&res, &exp, 8, _mask_cvt_roundepu64_ph);
      73  
      74    EMULATE(cvtq2_ph)(&exp, src3, N_ELEMS, 0xc1, 1);
      75    res.xmmh[0] = INTRINSIC (_maskz_cvt_roundepu64_ph) (0xc1, SI(src3), _ROUND_NINT);
      76    CHECK_RESULT (&res, &exp, 8, _maskz_cvt_roundepu64_ph);
      77  #endif
      78  
      79    if (n_errs != 0) {
      80        abort ();
      81    }
      82  }
      83