1  /* { dg-do run { target avx512fp16 } } */
       2  /* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
       3  
       4  
       5  #define AVX512FP16
       6  #include "avx512fp16-helper.h"
       7  
       8  #define N_ELEMS (AVX512F_LEN / 16)
       9  
      10  void NOINLINE
      11  EMULATE(cvtph2_w) (V512 * dest, V512 op1,
      12  		 __mmask32 k, int zero_mask)
      13  {
      14    V512 v1, v2, v3, v4, v5, v6, v7, v8;
      15    int i;
      16    __mmask16 m1, m2;
      17  
      18    m1 = k & 0xffff;
      19    m2 = (k >> 16) & 0xffff;
      20  
      21    unpack_ph_2twops(op1, &v1, &v2);
      22  
      23    for (i = 0; i < 16; i++) {
      24      if (((1 << i) & m1) == 0) {
      25        if (zero_mask) {
      26  	dest->u16[i] = 0;
      27        }
      28      }
      29      else {
      30        dest->u16[i] = v1.f32[i];
      31  
      32      }
      33  
      34      if (((1 << i) & m2) == 0) {
      35        if (zero_mask) {
      36  	dest->u16[i+16] = 0;
      37        }
      38      }
      39      else {
      40        dest->u16[i+16] = v2.f32[i];
      41      }
      42    }
      43  }
      44  
      45  void
      46  TEST (void)
      47  {
      48    V512 res;
      49    V512 exp;
      50  
      51    init_src();
      52  
      53    EMULATE(cvtph2_w)(&exp, src1,  NET_MASK, 0);
      54    SI(res) = INTRINSIC (_cvtph_epu16) (HF(src1));
      55    CHECK_RESULT (&res, &exp, N_ELEMS, _cvtph_epu16);
      56  
      57    init_dest(&res, &exp);
      58    EMULATE(cvtph2_w)(&exp, src1, MASK_VALUE, 0);
      59    SI(res) = INTRINSIC (_mask_cvtph_epu16) (SI(res), MASK_VALUE, HF(src1));
      60    CHECK_RESULT (&res, &exp, N_ELEMS, _mask_cvtph_epu16);
      61  
      62    EMULATE(cvtph2_w)(&exp, src1, ZMASK_VALUE, 1);
      63    SI(res) = INTRINSIC (_maskz_cvtph_epu16) (ZMASK_VALUE, HF(src1));
      64    CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_cvtph_epu16);
      65  
      66  #if AVX512F_LEN == 512
      67    EMULATE(cvtph2_w)(&exp, src1,  NET_MASK, 0);
      68    SI(res) = INTRINSIC (_cvt_roundph_epu16) (HF(src1), _ROUND_NINT);
      69    CHECK_RESULT (&res, &exp, N_ELEMS, _cvt_roundph_epu16);
      70  
      71    init_dest(&res, &exp);
      72    EMULATE(cvtph2_w)(&exp, src1, MASK_VALUE, 0);
      73    SI(res) = INTRINSIC (_mask_cvt_roundph_epu16) (SI(res), MASK_VALUE, HF(src1), _ROUND_NINT);
      74    CHECK_RESULT (&res, &exp, N_ELEMS, _mask_cvt_roundph_epu16);
      75  
      76    EMULATE(cvtph2_w)(&exp, src1, ZMASK_VALUE, 1);
      77    SI(res) = INTRINSIC (_maskz_cvt_roundph_epu16) (ZMASK_VALUE, HF(src1), _ROUND_NINT);
      78    CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_cvt_roundph_epu16);
      79  #endif
      80  
      81    if (n_errs != 0)
      82      abort ();
      83  }
      84