1 /* { dg-do run { target avx512fp16 } } */
2 /* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
3
4
5 #define AVX512FP16
6 #include "avx512fp16-helper.h"
7
8 #define N_ELEMS (AVX512F_LEN / 16)
9
10 void NOINLINE
11 EMULATE(cvtph2_q) (V512 * dest, V512 op1,
12 __mmask32 k, int zero_mask)
13 {
14 V512 v1, v2, v3, v4, v5, v6, v7, v8;
15 int i;
16 __mmask16 m1, m2;
17
18 m1 = k & 0xffff;
19
20 unpack_ph_2twops(op1, &v1, &v2);
21
22 for (i = 0; i < 8; i++) {
23 if (((1 << i) & m1) == 0) {
24 if (zero_mask) {
25 v5.u64[i] = 0;
26 }
27 else {
28 v5.u64[i] = dest->u64[i];
29 }
30 }
31 else {
32 v5.u64[i] = v1.f32[i];
33 }
34 }
35 *dest = v5;
36 }
37
38 void
39 TEST (void)
40 {
41 V512 res;
42 V512 exp;
43
44 init_src();
45
46 EMULATE(cvtph2_q)(&exp, src1, NET_MASK, 0);
47 SI(res) = INTRINSIC (_cvtph_epu64) (src1.xmmh[0]);
48 CHECK_RESULT (&res, &exp, N_ELEMS, _cvtph_epu64);
49
50 init_dest(&res, &exp);
51 EMULATE(cvtph2_q)(&exp, src1, 0xcc, 0);
52 SI(res) = INTRINSIC (_mask_cvtph_epu64) (SI(res), 0xcc, src1.xmmh[0]);
53 CHECK_RESULT (&res, &exp, N_ELEMS, _mask_cvtph_epu64);
54
55 EMULATE(cvtph2_q)(&exp, src1, 0xfc, 1);
56 SI(res) = INTRINSIC (_maskz_cvtph_epu64) (0xfc, src1.xmmh[0]);
57 CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_cvtph_epu64);
58
59 #if AVX512F_LEN == 512
60 EMULATE(cvtph2_q)(&exp, src1, NET_MASK, 0);
61 SI(res) = INTRINSIC (_cvt_roundph_epu64) (src1.xmmh[0], _ROUND_NINT);
62 CHECK_RESULT (&res, &exp, N_ELEMS, _cvt_roundph_epu64);
63
64 init_dest(&res, &exp);
65 EMULATE(cvtph2_q)(&exp, src1, 0xcc, 0);
66 SI(res) = INTRINSIC (_mask_cvt_roundph_epu64) (SI(res), 0xcc, src1.xmmh[0], _ROUND_NINT);
67 CHECK_RESULT (&res, &exp, N_ELEMS, _mask_cvt_roundph_epu64);
68
69 EMULATE(cvtph2_q)(&exp, src1, 0xfc, 1);
70 SI(res) = INTRINSIC (_maskz_cvt_roundph_epu64) (0xfc, src1.xmmh[0], _ROUND_NINT);
71 CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_cvt_roundph_epu64);
72 #endif
73
74 if (n_errs != 0) {
75 abort ();
76 }
77 }
78