1  /* Ensure that explicit zero-entend instructions are present when compiling
       2     for targets that may not have sram-ecc enabled (in which sub-dword loads do
       3     not zero the high bits of the target register).  */
       4  
       5  /* { dg-do compile } */
       6  /* { dg-options "-O2 -msram-ecc=any" } */
       7  
       8  extern unsigned char c;
       9  
      10  unsigned int
      11  f ()
      12  {
      13    return c;
      14  }
      15  
      16  /* { dg-final { scan-assembler "lshl.* 24" } } */
      17  /* { dg-final { scan-assembler "lshr.* 24" } } */