(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
gcn/
cond_smin_1.c
       1  /* { dg-do compile } */
       2  /* { dg-options "-O2 -ftree-vectorize -dp" } */
       3  
       4  #include <stdint.h>
       5  
       6  #define DO_REGREG_OPS(TYPE)                                                    \
       7    void __attribute__ ((noclone))                                               \
       8    varith_##TYPE##_reg (TYPE *__restrict x, TYPE *__restrict y,                 \
       9  		       TYPE *__restrict pred, int count)                       \
      10    {                                                                            \
      11      for (int i = 0; i < count; ++i)                                            \
      12        x[i] = (pred[i] != -1) ? (x[i] < y[i] ? x[i] : y[i]) : -4;               \
      13    }
      14  
      15  #define DO_IMMEDIATE_OPS(VALUE, TYPE, NAME)                                    \
      16    void __attribute__ ((noclone))                                               \
      17    varithimm_##NAME##_##TYPE (TYPE *__restrict x, TYPE *__restrict pred,        \
      18  			     int count)                                        \
      19    {                                                                            \
      20      for (int i = 0; i < count; ++i)                                            \
      21        x[i]                                                                     \
      22  	= (pred[i] != -1) ? (x[i] < (TYPE) VALUE ? x[i] : (TYPE) VALUE) : -4;  \
      23    }
      24  
      25  #define DO_ARITH_OPS(REG, IMM, TYPE)                                           \
      26    REG (TYPE);                                                                  \
      27    IMM (0, TYPE, 0);                                                            \
      28    IMM (86, TYPE, 86);                                                          \
      29    IMM (109, TYPE, 109);                                                        \
      30    IMM (141, TYPE, 141);                                                        \
      31    IMM (92137445376, TYPE, 92137445376);                                        \
      32    IMM (-1, TYPE, minus1);                                                      \
      33    IMM (-110, TYPE, minus110);                                                  \
      34    IMM (-141, TYPE, minus141);                                                  \
      35    IMM (-92137445376, TYPE, minus92137445376);
      36  
      37  #define TEST_ALL(REG, IMM)                                                     \
      38    DO_ARITH_OPS (REG, IMM, int8_t)                                              \
      39    DO_ARITH_OPS (REG, IMM, int16_t)                                             \
      40    DO_ARITH_OPS (REG, IMM, int32_t)                                             \
      41    DO_ARITH_OPS (REG, IMM, int64_t)
      42  
      43  TEST_ALL (DO_REGREG_OPS, DO_IMMEDIATE_OPS)
      44  
      45  /* One per test case < 64 bits */
      46  /* { dg-final { scan-assembler-times {sminv64si3_exec} 30 } } */
      47  /* { dg-final { scan-assembler-not {sminv64si3/0} } } */
      48  /* { dg-final { scan-assembler-not {\tv_writelane_b32\tv[0-9]+, vcc_??, 0} } } */
      49  
      50  /* Two per test case: */
      51  /* { dg-final { scan-assembler-times {\tv_cmp_gt_i32\tvcc, s[0-9]+, v[0-9]+} 80 } } */
      52  /* { dg-final { scan-assembler-not {\tv_cmpx_gt_i32\tvcc, s[0-9]+, v[0-9]+} } } */
      53  /* { dg-final { scan-assembler-not {\ts_cmpk_lg_u32\tvcc_lo, 0} } } */
      54  
      55  /* One per 64-bit test case: */
      56  /* { dg-final { scan-assembler-times {\tv_cmp_ne_u64\ts\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], -1} 10 } } */
      57  /* { dg-final { scan-assembler-times {\tv_cmp_lt_i64\tvcc, v[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]} 10 } } */