1  /* { dg-do assemble } */
       2  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
       3  /* { dg-add-options arm_v8_1m_mve_fp } */
       4  /* { dg-additional-options "-O3" } */
       5  
       6  #include <stdint.h>
       7  #include <arm_mve.h>
       8  
       9  #define FUNC(SIGN, TYPE, BITS, NB, OP, NAME)				\
      10    void test_ ## NAME ##_ ## SIGN ## BITS ## x ## NB (TYPE##BITS##_t * __restrict__ dest, TYPE##BITS##_t *a) { \
      11      int i;								\
      12      for (i=0; i<NB; i++) {						\
      13        dest[i] = OP a[i];						\
      14      }									\
      15  }
      16  
      17  #define FUNC_FLOAT(SIGN, TYPE, BITS, NB, OP, NAME)				\
      18    void test_ ## NAME ##_ ## SIGN ## BITS ## x ## NB (TYPE * __restrict__ dest, TYPE *a) { \
      19      int i;								\
      20      for (i=0; i<NB; i++) {						\
      21        dest[i] = OP a[i];						\
      22      }									\
      23  }
      24  
      25  /* vmnvq supports only 16-bit and 32-bit elements.  */
      26  /* 64-bit vectors.  */
      27  FUNC(s, int, 32, 2, -, vneg)
      28  FUNC(u, uint, 32, 2, -, vneg)
      29  FUNC(s, int, 16, 4, -, vneg)
      30  FUNC(u, uint, 16, 4, -, vneg)
      31  FUNC(s, int, 8, 8, -, vneg)
      32  FUNC(u, uint, 8, 8, -, vneg)
      33  FUNC_FLOAT(f, float, 32, 2, -, vneg)
      34  FUNC(f, float, 16, 4, -, vneg)
      35  
      36  /* 128-bit vectors.  */
      37  FUNC(s, int, 32, 4, -, vneg)
      38  FUNC(u, uint, 32, 4, -, vneg)
      39  FUNC(s, int, 16, 8, -, vneg)
      40  FUNC(u, uint, 16, 8, -, vneg)
      41  FUNC(s, int, 8, 16, -, vneg)
      42  FUNC(u, uint, 8, 16, -, vneg)
      43  FUNC_FLOAT(f, float, 32, 4, -, vneg)
      44  FUNC(f, float, 16, 8, -, vneg)
      45  
      46  /* MVE has only 128-bit vectors, so we can vectorize only half of the
      47     functions above.  */
      48  /* { dg-final { scan-assembler-times {vneg.s[0-9]+\tq[0-9]+, q[0-9]+} 6 } } */
      49  /* { dg-final { scan-assembler-times {vneg.f[0-9]+\tq[0-9]+, q[0-9]+} 2 } } */
      50  /* { dg-final { scan-assembler-times {vldr[bhw].[0-9]+\tq[0-9]+} 8 } } */
      51  /* { dg-final { scan-assembler-times {vstr[bhw].[0-9]+\tq[0-9]+} 8 } } */
      52  /* { dg-final { scan-assembler-not {orr\tr[0-9]+, r[0-9]+, r[0-9]+} } } */