1  /* { dg-do compile } */
       2  /* { dg-require-effective-target arm_neon_ok } */
       3  /* { dg-options "-O1 -funsafe-math-optimizations" }  */
       4  /* { dg-add-options arm_neon } */
       5  
       6  #ifndef ELEM_TYPE
       7  #define ELEM_TYPE float
       8  #endif
       9  #ifndef INT_ELEM_TYPE
      10  #define INT_ELEM_TYPE __INT32_TYPE__
      11  #endif
      12  
      13  #define COMPARE(NAME, OP) \
      14    int_vec \
      15    cmp_##NAME##_reg (vec a, vec b) \
      16    { \
      17      return a OP b; \
      18    } \
      19    \
      20    int_vec \
      21    cmp_##NAME##_zero (vec a) \
      22    { \
      23      return a OP (vec) {}; \
      24    }
      25  
      26  typedef INT_ELEM_TYPE int_vec __attribute__((vector_size(16)));
      27  typedef ELEM_TYPE vec __attribute__((vector_size(16)));
      28  
      29  COMPARE (eq, ==)
      30  COMPARE (ne, !=)
      31  COMPARE (lt, <)
      32  COMPARE (le, <=)
      33  COMPARE (gt, >)
      34  COMPARE (ge, >=)
      35  
      36  /* { dg-final { scan-assembler-times {\tvceq.f32\tq[0-9]+, q[0-9]+, q[0-9]+\n} 2 } } */
      37  /* { dg-final { scan-assembler-times {\tvceq.f32\tq[0-9]+, q[0-9]+, #0\n} 2 } } */
      38  
      39  /* { dg-final { scan-assembler-times {\tvcgt.f32\tq[0-9]+, q[0-9]+, q[0-9]+\n} 2 } } */
      40  /* { dg-final { scan-assembler-times {\tvcgt.f32\tq[0-9]+, q[0-9]+, #0\n} 1 } } */
      41  /* { dg-final { scan-assembler-times {\tvclt.f32\tq[0-9]+, q[0-9]+, #0\n} 1 } } */
      42  
      43  /* { dg-final { scan-assembler-times {\tvcge.f32\tq[0-9]+, q[0-9]+, q[0-9]+\n} 2 } } */
      44  /* { dg-final { scan-assembler-times {\tvcge.f32\tq[0-9]+, q[0-9]+, #0\n} 1 } } */
      45  /* { dg-final { scan-assembler-times {\tvcle.f32\tq[0-9]+, q[0-9]+, #0\n} 1 } } */