1  /* Verify that if IP is saved to ensure stack alignment, we don't load
       2     it into sp.  */
       3  /* { dg-do compile } */
       4  /* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mcpu=*" } { "-mcpu=iwmmxt" } } */
       5  /* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mabi=*" } { "-mabi=iwmmxt" } } */
       6  /* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-march=*" } { "-march=iwmmxt" } } */
       7  /* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */
       8  /* { dg-options "-O -mno-apcs-frame -mcpu=iwmmxt -mabi=iwmmxt" } */
       9  /* { dg-require-effective-target arm32 } */
      10  /* { dg-require-effective-target arm_iwmmxt_ok } */
      11  /* { dg-final { scan-assembler "push.*ip,\[ ]*pc" } } */
      12  /* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } */
      13  
      14  /* This function uses all the call-saved registers, namely r4, r5, r6,
      15     r7, r8, r9, sl, fp.  Since we also save lr, that leaves an odd
      16     number of registers, and the compiler will push ip to align the
      17     stack.  Make sure that we restore ip into ip, not into sp as is
      18     done when using a frame pointer.  The -mno-apcs-frame option
      19     permits the frame pointer to be used as an ordinary register.  */
      20  
      21  void
      22  foo(void)
      23  {
      24    __asm volatile ("" : : :
      25  		  "r4", "r5", "r6", "r7", "r8", "r9", "sl", "fp", "lr");
      26  }