1  /* { dg-do compile } */
       2  /* { dg-options "-mcmse" } */
       3  
       4  #include "../../bitfield-4.x"
       5  
       6  /* { dg-final { scan-assembler "movw\tip, #65535" } } */
       7  /* { dg-final { scan-assembler "movt\tip, 255" } } */
       8  /* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
       9  /* { dg-final { scan-assembler "mov\tip, #255" } } */
      10  /* { dg-final { scan-assembler "and\tr1, r1, ip" } } */
      11  /* { dg-final { scan-assembler "mov\tip, #3" } } */
      12  /* { dg-final { scan-assembler "and\tr2, r2, ip" } } */
      13  /* Shift on the same register as blxns.  */
      14  /* { dg-final { scan-assembler "lsrs\t(r\[3-9\]|r10|fp|ip), \\1, #1.*blxns\t\\1" } } */
      15  /* { dg-final { scan-assembler "lsls\t(r\[3-9\]|r10|fp|ip), \\1, #1.*blxns\t\\1" } } */
      16  /* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */
      17  /* Check the right registers are cleared and none appears twice.  */
      18  /* { dg-final { scan-assembler "clrm\t\{(r3, )?(r4, )?(r5, )?(r6, )?(r7, )?(r8, )?(r9, )?(r10, )?(fp, )?(ip, )?APSR\}" } } */
      19  /* Check that the right number of registers is cleared and thus only one
      20     register is missing.  */
      21  /* { dg-final { scan-assembler "clrm\t\{((r\[3-9\]|r10|fp|ip), ){9}APSR\}" } } */
      22  /* Check that no cleared register is used for blxns.  */
      23  /* { dg-final { scan-assembler-not "clrm\t\{\[^\}\]\+(r\[3-9\]|r10|fp|ip),\[^\}\]\+\}.*blxns\t\\1" } } */
      24  /* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */
      25  /* { dg-final { scan-assembler "blxns" } } */