(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
arm/
armv8_2-fp16-neon-2.c
       1  /* { dg-do compile }  */
       2  /* { dg-require-effective-target arm_v8_2a_fp16_neon_ok }  */
       3  /* { dg-options "-O2 -ffast-math" }  */
       4  /* { dg-add-options arm_v8_2a_fp16_neon }  */
       5  
       6  /* Test instructions generated for the FP16 vector intrinsics with
       7     -ffast-math */
       8  
       9  #include <arm_neon.h>
      10  
      11  #define MSTRCAT(L, str)	L##str
      12  
      13  #define UNOP_TEST(insn)				\
      14    float16x4_t					\
      15    MSTRCAT (test_##insn, _16x4) (float16x4_t a)	\
      16    {						\
      17      return MSTRCAT (insn, _f16) (a);		\
      18    }						\
      19    float16x8_t					\
      20    MSTRCAT (test_##insn, _16x8) (float16x8_t a)	\
      21    {						\
      22      return MSTRCAT (insn, q_f16) (a);		\
      23    }
      24  
      25  #define BINOP_TEST(insn)					\
      26    float16x4_t							\
      27    MSTRCAT (test_##insn, _16x4) (float16x4_t a, float16x4_t b)	\
      28    {								\
      29      return MSTRCAT (insn, _f16) (a, b);				\
      30    }								\
      31    float16x8_t							\
      32    MSTRCAT (test_##insn, _16x8) (float16x8_t a, float16x8_t b)	\
      33    {								\
      34      return MSTRCAT (insn, q_f16) (a, b);			\
      35    }
      36  
      37  #define BINOP_LANE_TEST(insn, I)					\
      38    float16x4_t								\
      39    MSTRCAT (test_##insn##_lane, _16x4) (float16x4_t a, float16x4_t b)	\
      40    {									\
      41      return MSTRCAT (insn, _lane_f16) (a, b, I);				\
      42    }									\
      43    float16x8_t								\
      44    MSTRCAT (test_##insn##_lane, _16x8) (float16x8_t a, float16x4_t b)	\
      45    {									\
      46      return MSTRCAT (insn, q_lane_f16) (a, b, I);			\
      47    }
      48  
      49  #define BINOP_LANEQ_TEST(insn, I)					\
      50    float16x4_t								\
      51    MSTRCAT (test_##insn##_laneq, _16x4) (float16x4_t a, float16x8_t b)	\
      52    {									\
      53      return MSTRCAT (insn, _laneq_f16) (a, b, I);			\
      54    }									\
      55    float16x8_t								\
      56    MSTRCAT (test_##insn##_laneq, _16x8) (float16x8_t a, float16x8_t b)	\
      57    {									\
      58      return MSTRCAT (insn, q_laneq_f16) (a, b, I);			\
      59    }									\
      60  
      61  #define BINOP_N_TEST(insn)					\
      62    float16x4_t							\
      63    MSTRCAT (test_##insn##_n, _16x4) (float16x4_t a, float16_t b)	\
      64    {								\
      65      return MSTRCAT (insn, _n_f16) (a, b);			\
      66    }								\
      67    float16x8_t							\
      68    MSTRCAT (test_##insn##_n, _16x8) (float16x8_t a, float16_t b)	\
      69    {								\
      70      return MSTRCAT (insn, q_n_f16) (a, b);			\
      71    }
      72  
      73  #define TERNOP_TEST(insn)						\
      74    float16_t								\
      75    MSTRCAT (test_##insn, _16) (float16_t a, float16_t b, float16_t c)	\
      76    {									\
      77      return MSTRCAT (insn, h_f16) (a, b, c);				\
      78    }									\
      79    float16x4_t								\
      80    MSTRCAT (test_##insn, _16x4) (float16x4_t a, float16x4_t b,		\
      81  			       float16x4_t c)				\
      82    {									\
      83      return MSTRCAT (insn, _f16) (a, b, c);				\
      84    }									\
      85    float16x8_t								\
      86    MSTRCAT (test_##insn, _16x8) (float16x8_t a, float16x8_t b,		\
      87  			       float16x8_t c)				\
      88    {									\
      89      return MSTRCAT (insn, q_f16) (a, b, c);				\
      90    }
      91  
      92  #define VCMP1_TEST(insn)			\
      93    uint16x4_t					\
      94    MSTRCAT (test_##insn, _16x4) (float16x4_t a)	\
      95    {						\
      96      return MSTRCAT (insn, _f16) (a);		\
      97    }						\
      98    uint16x8_t					\
      99    MSTRCAT (test_##insn, _16x8) (float16x8_t a)	\
     100    {						\
     101      return MSTRCAT (insn, q_f16) (a);		\
     102    }
     103  
     104  #define VCMP2_TEST(insn)					\
     105    uint16x4_t							\
     106    MSTRCAT (test_##insn, _16x4) (float16x4_t a, float16x4_t b)	\
     107    {								\
     108      return MSTRCAT (insn, _f16) (a, b);				\
     109    }								\
     110    uint16x8_t							\
     111    MSTRCAT (test_##insn, _16x8) (float16x8_t a, float16x8_t b)	\
     112    {								\
     113      return MSTRCAT (insn, q_f16) (a, b);			\
     114    }
     115  
     116  #define VCVT_TEST(insn, TY, TO, FR)			\
     117    MSTRCAT (TO, 16x4_t)					\
     118    MSTRCAT (test_##insn, TY) (MSTRCAT (FR, 16x4_t) a)	\
     119    {							\
     120      return MSTRCAT (insn, TY) (a);			\
     121    }							\
     122    MSTRCAT (TO, 16x8_t)					\
     123    MSTRCAT (test_##insn##_q, TY) (MSTRCAT (FR, 16x8_t) a)	\
     124    {							\
     125      return MSTRCAT (insn, q##TY) (a);			\
     126    }
     127  
     128  #define VCVT_N_TEST(insn, TY, TO, FR)			\
     129    MSTRCAT (TO, 16x4_t)					\
     130    MSTRCAT (test_##insn##_n, TY) (MSTRCAT (FR, 16x4_t) a)	\
     131    {							\
     132      return MSTRCAT (insn, _n##TY) (a, 1);		\
     133    }							\
     134    MSTRCAT (TO, 16x8_t)					\
     135    MSTRCAT (test_##insn##_n_q, TY) (MSTRCAT (FR, 16x8_t) a)	\
     136    {							\
     137      return MSTRCAT (insn, q_n##TY) (a, 1);		\
     138    }
     139  
     140  VCMP1_TEST (vceqz)
     141  /* { dg-final { scan-assembler-times {vceq\.f16\td[0-9]+, d[0-9]+, #0} 1 } }  */
     142  /* { dg-final { scan-assembler-times {vceq\.f16\tq[0-9]+, q[0-9]+, #0} 1 } }  */
     143  
     144  VCMP1_TEST (vcgtz)
     145  /* { dg-final { scan-assembler-times {vcgt\.f16\td[0-9]+, d[0-9]+, #0} 1 } }  */
     146  /* { dg-final { scan-assembler-times {vceq\.f16\tq[0-9]+, q[0-9]+, #0} 1 } }  */
     147  
     148  VCMP1_TEST (vcgez)
     149  /* { dg-final { scan-assembler-times {vcge\.f16\td[0-9]+, d[0-9]+, #0} 1 } }  */
     150  /* { dg-final { scan-assembler-times {vcge\.f16\tq[0-9]+, q[0-9]+, #0} 1 } }  */
     151  
     152  VCMP1_TEST (vcltz)
     153  /* { dg-final { scan-assembler-times {vclt.f16\td[0-9]+, d[0-9]+, #0} 1 } }  */
     154  /* { dg-final { scan-assembler-times {vclt.f16\tq[0-9]+, q[0-9]+, #0} 1 } }  */
     155  
     156  VCMP1_TEST (vclez)
     157  /* { dg-final { scan-assembler-times {vcle\.f16\td[0-9]+, d[0-9]+, #0} 1 } }  */
     158  /* { dg-final { scan-assembler-times {vcle\.f16\tq[0-9]+, q[0-9]+, #0} 1 } }  */
     159  
     160  VCVT_TEST (vcvt, _f16_s16, float, int)
     161  VCVT_N_TEST (vcvt, _f16_s16, float, int)
     162  /* { dg-final { scan-assembler-times {vcvt\.f16\.s16\td[0-9]+, d[0-9]+} 2 } }
     163     { dg-final { scan-assembler-times {vcvt\.f16\.s16\tq[0-9]+, q[0-9]+} 2 } }
     164     { dg-final { scan-assembler-times {vcvt\.f16\.s16\td[0-9]+, d[0-9]+, #1} 1 } }
     165     { dg-final { scan-assembler-times {vcvt\.f16\.s16\tq[0-9]+, q[0-9]+, #1} 1 } }  */
     166  
     167  VCVT_TEST (vcvt, _f16_u16, float, uint)
     168  VCVT_N_TEST (vcvt, _f16_u16, float, uint)
     169  /* { dg-final { scan-assembler-times {vcvt\.f16\.u16\td[0-9]+, d[0-9]+} 2 } }
     170     { dg-final { scan-assembler-times {vcvt\.f16\.u16\tq[0-9]+, q[0-9]+} 2 } }
     171     { dg-final { scan-assembler-times {vcvt\.f16\.u16\td[0-9]+, d[0-9]+, #1} 1 } }
     172     { dg-final { scan-assembler-times {vcvt\.f16\.u16\tq[0-9]+, q[0-9]+, #1} 1 } }  */
     173  
     174  VCVT_TEST (vcvt, _s16_f16, int, float)
     175  VCVT_N_TEST (vcvt, _s16_f16, int, float)
     176  /* { dg-final { scan-assembler-times {vcvt\.s16\.f16\td[0-9]+, d[0-9]+} 2 } }
     177     { dg-final { scan-assembler-times {vcvt\.s16\.f16\tq[0-9]+, q[0-9]+} 2 } }
     178     { dg-final { scan-assembler-times {vcvt\.s16\.f16\td[0-9]+, d[0-9]+, #1} 1 } }
     179     { dg-final { scan-assembler-times {vcvt\.s16\.f16\tq[0-9]+, q[0-9]+, #1} 1 } }  */
     180  
     181  VCVT_TEST (vcvt, _u16_f16, uint, float)
     182  VCVT_N_TEST (vcvt, _u16_f16, uint, float)
     183  /* { dg-final { scan-assembler-times {vcvt\.u16\.f16\td[0-9]+, d[0-9]+} 2 } }
     184     { dg-final { scan-assembler-times {vcvt\.u16\.f16\tq[0-9]+, q[0-9]+} 2 } }
     185     { dg-final { scan-assembler-times {vcvt\.u16\.f16\td[0-9]+, d[0-9]+, #1} 1 } }
     186     { dg-final { scan-assembler-times {vcvt\.u16\.f16\tq[0-9]+, q[0-9]+, #1} 1 } }  */
     187  
     188  VCVT_TEST (vcvta, _s16_f16, int, float)
     189  /* { dg-final { scan-assembler-times {vcvta\.s16\.f16\td[0-9]+, d[0-9]+} 1 } }
     190     { dg-final { scan-assembler-times {vcvta\.s16\.f16\tq[0-9]+, q[0-9]+} 1 } }
     191  */
     192  
     193  VCVT_TEST (vcvta, _u16_f16, uint, float)
     194  /* { dg-final { scan-assembler-times {vcvta\.u16\.f16\td[0-9]+, d[0-9]+} 1 } }
     195     { dg-final { scan-assembler-times {vcvta\.u16\.f16\tq[0-9]+, q[0-9]+} 1 } }
     196  */
     197  
     198  VCVT_TEST (vcvtm, _s16_f16, int, float)
     199  /* { dg-final { scan-assembler-times {vcvtm\.s16\.f16\td[0-9]+, d[0-9]+} 1 } }
     200     { dg-final { scan-assembler-times {vcvtm\.s16\.f16\tq[0-9]+, q[0-9]+} 1 } }
     201  */
     202  
     203  VCVT_TEST (vcvtm, _u16_f16, uint, float)
     204  /* { dg-final { scan-assembler-times {vcvtm\.u16\.f16\td[0-9]+, d[0-9]+} 1 } }
     205     { dg-final { scan-assembler-times {vcvtm\.u16\.f16\tq[0-9]+, q[0-9]+} 1 } }
     206  */
     207  
     208  VCVT_TEST (vcvtn, _s16_f16, int, float)
     209  /* { dg-final { scan-assembler-times {vcvtn\.s16\.f16\td[0-9]+, d[0-9]+} 1 } }
     210     { dg-final { scan-assembler-times {vcvtn\.s16\.f16\tq[0-9]+, q[0-9]+} 1 } }
     211  */
     212  
     213  VCVT_TEST (vcvtn, _u16_f16, uint, float)
     214  /* { dg-final { scan-assembler-times {vcvtn\.u16\.f16\td[0-9]+, d[0-9]+} 1 } }
     215     { dg-final { scan-assembler-times {vcvtn\.u16\.f16\tq[0-9]+, q[0-9]+} 1 } }
     216  */
     217  
     218  VCVT_TEST (vcvtp, _s16_f16, int, float)
     219  /* { dg-final { scan-assembler-times {vcvtp\.s16\.f16\td[0-9]+, d[0-9]+} 1 } }
     220     { dg-final { scan-assembler-times {vcvtp\.s16\.f16\tq[0-9]+, q[0-9]+} 1 } }
     221  */
     222  
     223  VCVT_TEST (vcvtp, _u16_f16, uint, float)
     224  /* { dg-final { scan-assembler-times {vcvtp\.u16\.f16\td[0-9]+, d[0-9]+} 1 } }
     225     { dg-final { scan-assembler-times {vcvtp\.u16\.f16\tq[0-9]+, q[0-9]+} 1 } }
     226  */
     227  
     228  UNOP_TEST (vabs)
     229  /* { dg-final { scan-assembler-times {vabs\.f16\td[0-9]+, d[0-9]+} 1 } }
     230     { dg-final { scan-assembler-times {vabs\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
     231  
     232  UNOP_TEST (vneg)
     233  /* { dg-final { scan-assembler-times {vneg\.f16\td[0-9]+, d[0-9]+} 1 } }
     234     { dg-final { scan-assembler-times {vneg\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
     235  
     236  UNOP_TEST (vrecpe)
     237  /* { dg-final { scan-assembler-times {vrecpe\.f16\td[0-9]+, d[0-9]+} 1 } }
     238     { dg-final { scan-assembler-times {vrecpe\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
     239  
     240  UNOP_TEST (vrnd)
     241  /* { dg-final { scan-assembler-times {vrintz\.f16\td[0-9]+, d[0-9]+} 1 } }
     242     { dg-final { scan-assembler-times {vrintz\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
     243  
     244  UNOP_TEST (vrnda)
     245  /* { dg-final { scan-assembler-times {vrinta\.f16\td[0-9]+, d[0-9]+} 1 } }
     246     { dg-final { scan-assembler-times {vrinta\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
     247  
     248  UNOP_TEST (vrndm)
     249  /* { dg-final { scan-assembler-times {vrintm\.f16\td[0-9]+, d[0-9]+} 1 } }
     250     { dg-final { scan-assembler-times {vrintm\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
     251  
     252  UNOP_TEST (vrndn)
     253  /* { dg-final { scan-assembler-times {vrintn\.f16\td[0-9]+, d[0-9]+} 1 } }
     254     { dg-final { scan-assembler-times {vrintn\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
     255  
     256  UNOP_TEST (vrndp)
     257  /* { dg-final { scan-assembler-times {vrintp\.f16\td[0-9]+, d[0-9]+} 1 } }
     258     { dg-final { scan-assembler-times {vrintp\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
     259  
     260  UNOP_TEST (vrndx)
     261  /* { dg-final { scan-assembler-times {vrintx\.f16\td[0-9]+, d[0-9]+} 1 } }
     262     { dg-final { scan-assembler-times {vrintx\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
     263  
     264  UNOP_TEST (vrsqrte)
     265  /* { dg-final { scan-assembler-times {vrsqrte\.f16\td[0-9]+, d[0-9]+} 1 } }
     266     { dg-final { scan-assembler-times {vrsqrte\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
     267  
     268  BINOP_TEST (vadd)
     269  /* { dg-final { scan-assembler-times {vadd\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     270     { dg-final { scan-assembler-times {vadd\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     271  
     272  BINOP_TEST (vabd)
     273  /* { dg-final { scan-assembler-times {vabd\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     274     { dg-final { scan-assembler-times {vabd\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     275  
     276  VCMP2_TEST (vcage)
     277  /* { dg-final { scan-assembler-times {vacge\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     278     { dg-final { scan-assembler-times {vacge\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     279  
     280  VCMP2_TEST (vcagt)
     281  /* { dg-final { scan-assembler-times {vacgt\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     282     { dg-final { scan-assembler-times {vacgt\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     283  
     284  VCMP2_TEST (vcale)
     285  /* { dg-final { scan-assembler-times {vacle\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     286     { dg-final { scan-assembler-times {vacle\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     287  
     288  VCMP2_TEST (vcalt)
     289  /* { dg-final { scan-assembler-times {vaclt\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     290     { dg-final { scan-assembler-times {vaclt\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     291  
     292  VCMP2_TEST (vceq)
     293  /* { dg-final { scan-assembler-times {vceq\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     294     { dg-final { scan-assembler-times {vceq\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     295  
     296  VCMP2_TEST (vcge)
     297  /* { dg-final { scan-assembler-times {vcge\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     298     { dg-final { scan-assembler-times {vcge\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     299  
     300  VCMP2_TEST (vcgt)
     301  /* { dg-final { scan-assembler-times {vcgt\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     302     { dg-final { scan-assembler-times {vcgt\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     303  
     304  VCMP2_TEST (vcle)
     305  /* { dg-final { scan-assembler-times {vcle\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     306     { dg-final { scan-assembler-times {vcle\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     307  
     308  VCMP2_TEST (vclt)
     309  /* { dg-final { scan-assembler-times {vclt\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     310     { dg-final { scan-assembler-times {vclt\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     311  
     312  BINOP_TEST (vmax)
     313  /* { dg-final { scan-assembler-times {vmax\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     314     { dg-final { scan-assembler-times {vmax\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     315  
     316  BINOP_TEST (vmin)
     317  /* { dg-final { scan-assembler-times {vmin\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     318     { dg-final { scan-assembler-times {vmin\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     319  
     320  BINOP_TEST (vmaxnm)
     321  /* { dg-final { scan-assembler-times {vmaxnm\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     322    { dg-final { scan-assembler-times {vmaxnm\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     323  
     324  BINOP_TEST (vminnm)
     325  /* { dg-final { scan-assembler-times {vminnm\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     326    { dg-final { scan-assembler-times {vminnm\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     327  
     328  BINOP_TEST (vmul)
     329  /* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 3 } }
     330     { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } }  */
     331  BINOP_LANE_TEST (vmul, 2)
     332  /* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+, d[0-9]+\[2\]} 1 } }
     333     { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, d[0-9]+\[2\]} 1 } }  */
     334  BINOP_N_TEST (vmul)
     335  /* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 3 } }
     336     { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } }*/
     337  
     338  float16x4_t
     339  test_vpadd_16x4 (float16x4_t a, float16x4_t b)
     340  {
     341    return vpadd_f16 (a, b);
     342  }
     343  /* { dg-final { scan-assembler-times {vpadd\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } } */
     344  
     345  float16x4_t
     346  test_vpmax_16x4 (float16x4_t a, float16x4_t b)
     347  {
     348    return vpmax_f16 (a, b);
     349  }
     350  /* { dg-final { scan-assembler-times {vpmax\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } } */
     351  
     352  float16x4_t
     353  test_vpmin_16x4 (float16x4_t a, float16x4_t b)
     354  {
     355    return vpmin_f16 (a, b);
     356  }
     357  /* { dg-final { scan-assembler-times {vpmin\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } } */
     358  
     359  BINOP_TEST (vsub)
     360  /* { dg-final { scan-assembler-times {vsub\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     361     { dg-final { scan-assembler-times {vsub\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     362  
     363  BINOP_TEST (vrecps)
     364  /* { dg-final { scan-assembler-times {vrecps\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     365    { dg-final { scan-assembler-times {vrecps\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     366  
     367  BINOP_TEST (vrsqrts)
     368  /* { dg-final { scan-assembler-times {vrsqrts\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     369    { dg-final { scan-assembler-times {vrsqrts\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     370  
     371  TERNOP_TEST (vfma)
     372  /* { dg-final { scan-assembler-times {vfma\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     373    { dg-final { scan-assembler-times {vfma\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     374  
     375  TERNOP_TEST (vfms)
     376  /* { dg-final { scan-assembler-times {vfms\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
     377    { dg-final { scan-assembler-times {vfms\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     378  
     379  float16x4_t
     380  test_vmov_n_f16 (float16_t a)
     381  {
     382    return vmov_n_f16 (a);
     383  }
     384  
     385  float16x4_t
     386  test_vdup_n_f16 (float16_t a)
     387  {
     388    return vdup_n_f16 (a);
     389  }
     390  /* { dg-final { scan-assembler-times {vdup\.16\td[0-9]+, r[0-9]+} 3 } }  */
     391  
     392  float16x8_t
     393  test_vmovq_n_f16 (float16_t a)
     394  {
     395    return vmovq_n_f16 (a);
     396  }
     397  
     398  float16x8_t
     399  test_vdupq_n_f16 (float16_t a)
     400  {
     401    return vdupq_n_f16 (a);
     402  }
     403  /* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, r[0-9]+} 3 } }  */
     404  
     405  float16x4_t
     406  test_vdup_lane_f16 (float16x4_t a)
     407  {
     408    return vdup_lane_f16 (a, 1);
     409  }
     410  /* { dg-final { scan-assembler-times {vdup\.16\td[0-9]+, d[0-9]+\[1\]} 1 } }  */
     411  
     412  float16x8_t
     413  test_vdupq_lane_f16 (float16x4_t a)
     414  {
     415    return vdupq_lane_f16 (a, 1);
     416  }
     417  /* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, d[0-9]+\[1\]} 1 } }  */
     418  
     419  float16x4_t
     420  test_vext_f16 (float16x4_t a, float16x4_t b)
     421  {
     422    return vext_f16 (a, b, 1);
     423  }
     424  /* { dg-final { scan-assembler-times {vext\.16\td[0-9]+, d[0-9]+, d[0-9]+, #1} 1 } } */
     425  
     426  float16x8_t
     427  test_vextq_f16 (float16x8_t a, float16x8_t b)
     428  {
     429    return vextq_f16 (a, b, 1);
     430  }
     431  /*   { dg-final { scan-assembler-times {vext\.16\tq[0-9]+, q[0-9]+, q[0-9]+, #1} 1 } }  */
     432  
     433  UNOP_TEST (vrev64)
     434  /* { dg-final { scan-assembler-times {vrev64\.16\td[0-9]+, d[0-9]+} 1 } }
     435     { dg-final { scan-assembler-times {vrev64\.16\tq[0-9]+, q[0-9]+} 1 } }  */
     436  
     437  float16x4_t
     438  test_vbsl16x4 (uint16x4_t a, float16x4_t b, float16x4_t c)
     439  {
     440    return vbsl_f16 (a, b, c);
     441  }
     442  /* { dg-final { scan-assembler-times {vbsl\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }  */
     443  
     444  float16x8_t
     445  test_vbslq16x8 (uint16x8_t a, float16x8_t b, float16x8_t c)
     446  {
     447    return vbslq_f16 (a, b, c);
     448  }
     449  /*{ dg-final { scan-assembler-times {vbsl\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
     450  
     451  float16x4x2_t
     452  test_vzip16x4 (float16x4_t a, float16x4_t b)
     453  {
     454    return vzip_f16 (a, b);
     455  }
     456  /* { dg-final { scan-assembler-times {vzip\.16\td[0-9]+, d[0-9]+} 1 } }  */
     457  
     458  float16x8x2_t
     459  test_vzipq16x8 (float16x8_t a, float16x8_t b)
     460  {
     461    return vzipq_f16 (a, b);
     462  }
     463  /*{ dg-final { scan-assembler-times {vzip\.16\tq[0-9]+, q[0-9]+} 1 } }  */
     464  
     465  float16x4x2_t
     466  test_vuzp16x4 (float16x4_t a, float16x4_t b)
     467  {
     468    return vuzp_f16 (a, b);
     469  }
     470  /* { dg-final { scan-assembler-times {vuzp\.16\td[0-9]+, d[0-9]+} 1 } }  */
     471  
     472  float16x8x2_t
     473  test_vuzpq16x8 (float16x8_t a, float16x8_t b)
     474  {
     475    return vuzpq_f16 (a, b);
     476  }
     477  /*{ dg-final { scan-assembler-times {vuzp\.16\tq[0-9]+, q[0-9]+} 1 } }  */
     478  
     479  float16x4x2_t
     480  test_vtrn16x4 (float16x4_t a, float16x4_t b)
     481  {
     482    return vtrn_f16 (a, b);
     483  }
     484  /* { dg-final { scan-assembler-times {vtrn\.16\td[0-9]+, d[0-9]+} 1 } }  */
     485  
     486  float16x8x2_t
     487  test_vtrnq16x8 (float16x8_t a, float16x8_t b)
     488  {
     489    return vtrnq_f16 (a, b);
     490  }
     491  /*{ dg-final { scan-assembler-times {vtrn\.16\tq[0-9]+, q[0-9]+} 1 } }  */