1 /* { dg-do compile } */
2 /* { dg-options "-O -mfp16-format=ieee" } */
3 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
4 /* { dg-add-options arm_v8_1m_mve } */
5 /* { dg-additional-options "-mfloat-abi=hard" } *
6 /* { dg-final { check-function-bodies "**" "" } } */
7
8 /*
9 ** r_w:
10 ** vmov.f16 r0, s0 @ __fp16
11 ** bx lr
12 */
13 void
14 r_w (_Float16 s0)
15 {
16 register _Float16 r0 asm ("r0");
17 r0 = s0;
18 asm volatile ("" :: "r" (r0));
19 }
20
21 /*
22 ** w_r:
23 ** vmov.f16 s0, r0 @ __fp16
24 ** bx lr
25 */
26 _Float16
27 w_r ()
28 {
29 register _Float16 r0 asm ("r0");
30 asm volatile ("" : "=r" (r0));
31 return r0;
32 }
33
34 /*
35 ** w_w:
36 ** vmov s1, s0 @ __fp16
37 ** bx lr
38 */
39 void
40 w_w (_Float16 s0)
41 {
42 register _Float16 s1 asm ("s1");
43 s1 = s0;
44 asm volatile ("" :: "w" (s1));
45 }
46
47 /*
48 ** r_m_m128:
49 ** sub (r[0-9]+), r0, #256
50 ** ldrh r1, \[\1\] @ __fp16
51 ** bx lr
52 */
53 void
54 r_m_m128 (_Float16 *r0)
55 {
56 register _Float16 r1 asm ("r1");
57 r1 = r0[-128];
58 asm volatile ("" :: "r" (r1));
59 }
60
61 /*
62 ** r_m_m127:
63 ** ldrh r1, \[r0, #-254\] @ __fp16
64 ** bx lr
65 */
66 void
67 r_m_m127 (_Float16 *r0)
68 {
69 register _Float16 r1 asm ("r1");
70 r1 = r0[-127];
71 asm volatile ("" :: "r" (r1));
72 }
73
74 /*
75 ** r_m_m1:
76 ** ldrh r1, \[r0, #-2\] @ __fp16
77 ** bx lr
78 */
79 void
80 r_m_m1 (_Float16 *r0)
81 {
82 register _Float16 r1 asm ("r1");
83 r1 = r0[-1];
84 asm volatile ("" :: "r" (r1));
85 }
86
87 /*
88 ** r_m_0:
89 ** ldrh r1, \[r0\] @ __fp16
90 ** bx lr
91 */
92 void
93 r_m_0 (_Float16 *r0)
94 {
95 register _Float16 r1 asm ("r1");
96 r1 = r0[0];
97 asm volatile ("" :: "r" (r1));
98 }
99
100 /*
101 ** r_m_1:
102 ** ldrh r1, \[r0, #2\] @ __fp16
103 ** bx lr
104 */
105 void
106 r_m_1 (_Float16 *r0)
107 {
108 register _Float16 r1 asm ("r1");
109 r1 = r0[1];
110 asm volatile ("" :: "r" (r1));
111 }
112
113 /*
114 ** r_m_255:
115 ** ldrh r1, \[r0, #510\] @ __fp16
116 ** bx lr
117 */
118 void
119 r_m_255 (_Float16 *r0)
120 {
121 register _Float16 r1 asm ("r1");
122 r1 = r0[255];
123 asm volatile ("" :: "r" (r1));
124 }
125
126 /*
127 ** r_m_256:
128 ** ldrh r1, \[r0, #512\] @ __fp16
129 ** bx lr
130 */
131 void
132 r_m_256 (_Float16 *r0)
133 {
134 register _Float16 r1 asm ("r1");
135 r1 = r0[256];
136 asm volatile ("" :: "r" (r1));
137 }
138
139 /* ??? This could be done in one instruction, but without mve.fp,
140 it makes more sense for memory_operand to enforce the GPR range. */
141 /*
142 ** w_m_m128:
143 ** sub (r[0-9]+), r0, #256
144 ** vldr.16 s0, \[\1\]
145 ** bx lr
146 */
147 void
148 w_m_m128 (_Float16 *r0)
149 {
150 register _Float16 s0 asm ("s0");
151 s0 = r0[-128];
152 asm volatile ("" :: "w" (s0));
153 }
154
155 /*
156 ** w_m_m127:
157 ** vldr.16 s0, \[r0, #-254\]
158 ** bx lr
159 */
160 void
161 w_m_m127 (_Float16 *r0)
162 {
163 register _Float16 s0 asm ("s0");
164 s0 = r0[-127];
165 asm volatile ("" :: "w" (s0));
166 }
167
168 /*
169 ** w_m_m1:
170 ** vldr.16 s0, \[r0, #-2\]
171 ** bx lr
172 */
173 void
174 w_m_m1 (_Float16 *r0)
175 {
176 register _Float16 s0 asm ("s0");
177 s0 = r0[-1];
178 asm volatile ("" :: "w" (s0));
179 }
180
181 /*
182 ** w_m_0:
183 ** vldr.16 s0, \[r0\]
184 ** bx lr
185 */
186 void
187 w_m_0 (_Float16 *r0)
188 {
189 register _Float16 s0 asm ("s0");
190 s0 = r0[0];
191 asm volatile ("" :: "w" (s0));
192 }
193
194 /*
195 ** w_m_1:
196 ** vldr.16 s0, \[r0, #2\]
197 ** bx lr
198 */
199 void
200 w_m_1 (_Float16 *r0)
201 {
202 register _Float16 s0 asm ("s0");
203 s0 = r0[1];
204 asm volatile ("" :: "w" (s0));
205 }
206
207 /*
208 ** w_m_255:
209 ** vldr.16 s0, \[r0, #510\]
210 ** bx lr
211 */
212 void
213 w_m_255 (_Float16 *r0)
214 {
215 register _Float16 s0 asm ("s0");
216 s0 = r0[255];
217 asm volatile ("" :: "w" (s0));
218 }
219
220 /*
221 ** w_m_256:
222 ** add (r[0-9]+), r0, #512
223 ** vldr.16 s0, \[\1\]
224 ** bx lr
225 */
226 void
227 w_m_256 (_Float16 *r0)
228 {
229 register _Float16 s0 asm ("s0");
230 s0 = r0[256];
231 asm volatile ("" :: "w" (s0));
232 }
233
234 /*
235 ** m_m128_r:
236 ** sub (r[0-9]+), r0, #256
237 ** strh r1, \[\1\] @ __fp16
238 ** bx lr
239 */
240 void
241 m_m128_r (_Float16 *r0)
242 {
243 register _Float16 r1 asm ("r1");
244 asm volatile ("" : "=r" (r1));
245 r0[-128] = r1;
246 }
247
248 /*
249 ** m_m127_r:
250 ** strh r1, \[r0, #-254\] @ __fp16
251 ** bx lr
252 */
253 void
254 m_m127_r (_Float16 *r0)
255 {
256 register _Float16 r1 asm ("r1");
257 asm volatile ("" : "=r" (r1));
258 r0[-127] = r1;
259 }
260
261 /*
262 ** m_m1_r:
263 ** strh r1, \[r0, #-2\] @ __fp16
264 ** bx lr
265 */
266 void
267 m_m1_r (_Float16 *r0)
268 {
269 register _Float16 r1 asm ("r1");
270 asm volatile ("" : "=r" (r1));
271 r0[-1] = r1;
272 }
273
274 /*
275 ** m_0_r:
276 ** strh r1, \[r0\] @ __fp16
277 ** bx lr
278 */
279 void
280 m_0_r (_Float16 *r0)
281 {
282 register _Float16 r1 asm ("r1");
283 asm volatile ("" : "=r" (r1));
284 r0[0] = r1;
285 }
286
287 /*
288 ** m_1_r:
289 ** strh r1, \[r0, #2\] @ __fp16
290 ** bx lr
291 */
292 void
293 m_1_r (_Float16 *r0)
294 {
295 register _Float16 r1 asm ("r1");
296 asm volatile ("" : "=r" (r1));
297 r0[1] = r1;
298 }
299
300 /*
301 ** m_255_r:
302 ** strh r1, \[r0, #510\] @ __fp16
303 ** bx lr
304 */
305 void
306 m_255_r (_Float16 *r0)
307 {
308 register _Float16 r1 asm ("r1");
309 asm volatile ("" : "=r" (r1));
310 r0[255] = r1;
311 }
312
313 /*
314 ** m_256_r:
315 ** strh r1, \[r0, #512\] @ __fp16
316 ** bx lr
317 */
318 void
319 m_256_r (_Float16 *r0)
320 {
321 register _Float16 r1 asm ("r1");
322 asm volatile ("" : "=r" (r1));
323 r0[256] = r1;
324 }
325
326 /* ??? This could be done in one instruction, but without mve.fp,
327 it makes more sense for memory_operand to enforce the GPR range. */
328 /*
329 ** m_m128_w:
330 ** sub (r[0-9]+), r0, #256
331 ** vstr.16 s0, \[\1\]
332 ** bx lr
333 */
334 void
335 m_m128_w (_Float16 *r0)
336 {
337 register _Float16 s0 asm ("s0");
338 asm volatile ("" : "=w" (s0));
339 r0[-128] = s0;
340 }
341
342 /*
343 ** m_m127_w:
344 ** vstr.16 s0, \[r0, #-254\]
345 ** bx lr
346 */
347 void
348 m_m127_w (_Float16 *r0)
349 {
350 register _Float16 s0 asm ("s0");
351 asm volatile ("" : "=w" (s0));
352 r0[-127] = s0;
353 }
354
355 /*
356 ** m_m1_w:
357 ** vstr.16 s0, \[r0, #-2\]
358 ** bx lr
359 */
360 void
361 m_m1_w (_Float16 *r0)
362 {
363 register _Float16 s0 asm ("s0");
364 asm volatile ("" : "=w" (s0));
365 r0[-1] = s0;
366 }
367
368 /*
369 ** m_0_w:
370 ** vstr.16 s0, \[r0\]
371 ** bx lr
372 */
373 void
374 m_0_w (_Float16 *r0)
375 {
376 register _Float16 s0 asm ("s0");
377 asm volatile ("" : "=w" (s0));
378 r0[0] = s0;
379 }
380
381 /*
382 ** m_1_w:
383 ** vstr.16 s0, \[r0, #2\]
384 ** bx lr
385 */
386 void
387 m_1_w (_Float16 *r0)
388 {
389 register _Float16 s0 asm ("s0");
390 asm volatile ("" : "=w" (s0));
391 r0[1] = s0;
392 }
393
394 /*
395 ** m_255_w:
396 ** vstr.16 s0, \[r0, #510\]
397 ** bx lr
398 */
399 void
400 m_255_w (_Float16 *r0)
401 {
402 register _Float16 s0 asm ("s0");
403 asm volatile ("" : "=w" (s0));
404 r0[255] = s0;
405 }
406
407 /*
408 ** m_256_w:
409 ** add (r[0-9]+), r0, #512
410 ** vstr.16 s0, \[\1\]
411 ** bx lr
412 */
413 void
414 m_256_w (_Float16 *r0)
415 {
416 register _Float16 s0 asm ("s0");
417 asm volatile ("" : "=w" (s0));
418 r0[256] = s0;
419 }