1 /* Test the CDE ACLE intrinsic. */
2 /* { dg-do compile } */
3 /* { dg-require-effective-target arm_v8m_main_cde_fp_ok } */
4 /* { dg-add-options arm_v8m_main_cde_fp } */
5
6 #include "arm_cde.h"
7
8 uint64_t test_coproc_range (uint32_t a, uint64_t b)
9 {
10 uint64_t res = 0;
11 res += __arm_vcx1_u32 (8, 0); /* { dg-error {coproc must be a constant immediate in range \[0-7\]} } */
12 res += __arm_vcx1a_u32 (8, a, 0); /* { dg-error {coproc must be a constant immediate in range \[0-7\]} } */
13 res += __arm_vcx2_u32 (8, a, 0); /* { dg-error {coproc must be a constant immediate in range \[0-7\]} } */
14 res += __arm_vcx2a_u32 (8, a, a, 0); /* { dg-error {coproc must be a constant immediate in range \[0-7\]} } */
15 res += __arm_vcx3_u32 (8, a, a, 0); /* { dg-error {coproc must be a constant immediate in range \[0-7\]} } */
16 res += __arm_vcx3a_u32 (8, a, a, a, 0); /* { dg-error {coproc must be a constant immediate in range \[0-7\]} } */
17 res += __arm_vcx1d_u64 (8, 0); /* { dg-error {coproc must be a constant immediate in range \[0-7\]} } */
18 res += __arm_vcx1da_u64 (8, a, 0); /* { dg-error {coproc must be a constant immediate in range \[0-7\]} } */
19 res += __arm_vcx2d_u64 (8, a, 0); /* { dg-error {coproc must be a constant immediate in range \[0-7\]} } */
20 res += __arm_vcx2da_u64 (8, a, a, 0); /* { dg-error {coproc must be a constant immediate in range \[0-7\]} } */
21 res += __arm_vcx3d_u64 (8, a, a, 0); /* { dg-error {coproc must be a constant immediate in range \[0-7\]} } */
22 res += __arm_vcx3da_u64 (8, a, a, a, 0); /* { dg-error {coproc must be a constant immediate in range \[0-7\]} } */
23 return res;
24 }
25
26 uint64_t test_imm_range (uint32_t a, uint64_t b)
27 {
28 uint64_t res = 0;
29 res += __arm_vcx1_u32 (0, 2048); /* { dg-error {argument [2-5] to '__builtin_arm_vcx1si' must be a constant immediate in range \[0-2047\]} } */
30 res += __arm_vcx1a_u32 (0, a, 2048); /* { dg-error {argument [2-5] to '__builtin_arm_vcx1asi' must be a constant immediate in range \[0-2047\]} } */
31 res += __arm_vcx2_u32 (0, a, 64); /* { dg-error {argument [2-5] to '__builtin_arm_vcx2si' must be a constant immediate in range \[0-63\]} } */
32 res += __arm_vcx2a_u32 (0, a, a, 64); /* { dg-error {argument [2-5] to '__builtin_arm_vcx2asi' must be a constant immediate in range \[0-63\]} } */
33 res += __arm_vcx3_u32 (0, a, a, 8); /* { dg-error {argument [2-5] to '__builtin_arm_vcx3si' must be a constant immediate in range \[0-7\]} } */
34 res += __arm_vcx3a_u32 (0, a, a, a, 8); /* { dg-error {argument [2-5] to '__builtin_arm_vcx3asi' must be a constant immediate in range \[0-7\]} } */
35 res += __arm_vcx1d_u64 (0, 2048); /* { dg-error {argument [2-5] to '__builtin_arm_vcx1di' must be a constant immediate in range \[0-2047\]} } */
36 res += __arm_vcx1da_u64 (0, a, 2048); /* { dg-error {argument [2-5] to '__builtin_arm_vcx1adi' must be a constant immediate in range \[0-2047\]} } */
37 res += __arm_vcx2d_u64 (0, a, 64); /* { dg-error {argument [2-5] to '__builtin_arm_vcx2di' must be a constant immediate in range \[0-63\]} } */
38 res += __arm_vcx2da_u64 (0, a, a, 64); /* { dg-error {argument [2-5] to '__builtin_arm_vcx2adi' must be a constant immediate in range \[0-63\]} } */
39 res += __arm_vcx3d_u64 (0, a, a, 8); /* { dg-error {argument [2-5] to '__builtin_arm_vcx3di' must be a constant immediate in range \[0-7\]} } */
40 res += __arm_vcx3da_u64 (0, a, a, a, 8); /* { dg-error {argument [2-5] to '__builtin_arm_vcx3adi' must be a constant immediate in range \[0-7\]} } */
41 return res;
42 }
43
44 #pragma GCC push_options
45 #pragma GCC target ("arch=armv8-m.main+cdecp1+fp")
46 uint64_t test_coproc_match_1 (uint32_t a, uint64_t b)
47 {
48 uint64_t res = 0;
49 res += __arm_vcx1_u32 (0, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
50 res += __arm_vcx1a_u32 (0, a, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
51 res += __arm_vcx2_u32 (0, a, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
52 res += __arm_vcx2a_u32 (0, a, a, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
53 res += __arm_vcx3_u32 (0, a, a, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
54 res += __arm_vcx3a_u32 (0, a, a, a, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
55 res += __arm_vcx1d_u64 (0, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
56 res += __arm_vcx1da_u64 (0, a, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
57 res += __arm_vcx2d_u64 (0, a, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
58 res += __arm_vcx2da_u64 (0, a, a, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
59 res += __arm_vcx3d_u64 (0, a, a, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
60 res += __arm_vcx3da_u64 (0, a, a, a, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
61 return res;
62 }
63 #pragma GCC pop_options
64
65 #pragma GCC push_options
66 #pragma GCC target ("arch=armv8-m.main+cdecp2+fp")
67 uint32_t test_coproc_match_2 ()
68 {
69 return __arm_vcx1_u32 (0, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
70 }
71 #pragma GCC pop_options
72
73 #pragma GCC push_options
74 #pragma GCC target ("arch=armv8-m.main+cdecp3+fp")
75 uint32_t test_coproc_match_3 ()
76 {
77 return __arm_vcx1_u32 (0, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
78 }
79 #pragma GCC pop_options
80
81 #pragma GCC push_options
82 #pragma GCC target ("arch=armv8-m.main+cdecp4+fp")
83 uint32_t test_coproc_match_4 ()
84 {
85 return __arm_vcx1_u32 (0, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
86 }
87 #pragma GCC pop_options
88
89 #pragma GCC push_options
90 #pragma GCC target ("arch=armv8-m.main+cdecp5+fp")
91 uint32_t test_coproc_match_5 ()
92 {
93 return __arm_vcx1_u32 (0, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
94 }
95 #pragma GCC pop_options
96
97 #pragma GCC push_options
98 #pragma GCC target ("arch=armv8-m.main+cdecp6+fp")
99 uint32_t test_coproc_match_6 ()
100 {
101 return __arm_vcx1_u32 (0, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
102 }
103 #pragma GCC pop_options
104
105 #pragma GCC push_options
106 #pragma GCC target ("arch=armv8-m.main+cdecp7+fp")
107 uint32_t test_coproc_match_7 ()
108 {
109 return __arm_vcx1_u32 (0, 0); /* { dg-error {coprocessor 0 is not enabled with \+cdecp0} } */
110 }
111 #pragma GCC pop_options
112
113 #pragma GCC push_options
114 #pragma GCC target ("arch=armv8-m.main+cdecp0+fp")
115 uint32_t test_coproc_match_0 ()
116 {
117 uint64_t res = 0;
118 res += __arm_vcx1_u32 (1, 0); /* { dg-error {coprocessor 1 is not enabled with \+cdecp1} } */
119 res += __arm_vcx1_u32 (2, 0); /* { dg-error {coprocessor 2 is not enabled with \+cdecp2} } */
120 res += __arm_vcx1_u32 (3, 0); /* { dg-error {coprocessor 3 is not enabled with \+cdecp3} } */
121 res += __arm_vcx1_u32 (4, 0); /* { dg-error {coprocessor 4 is not enabled with \+cdecp4} } */
122 res += __arm_vcx1_u32 (5, 0); /* { dg-error {coprocessor 5 is not enabled with \+cdecp5} } */
123 res += __arm_vcx1_u32 (6, 0); /* { dg-error {coprocessor 6 is not enabled with \+cdecp6} } */
124 res += __arm_vcx1_u32 (7, 0); /* { dg-error {coprocessor 7 is not enabled with \+cdecp7} } */
125 return res;
126 }
127 #pragma GCC pop_options