1  /* { dg-do compile } */
       2  /* { dg-options "-O2" } */
       3  
       4  #include "arm_neon.h"
       5  
       6  /* For each of these intrinsics, we map directly to an unspec in RTL.
       7     We're just using the argument directly and returning the result, so we
       8     can precisely specify the exact instruction pattern and register
       9     allocations we expect.  */
      10  
      11  float64x1_t
      12  test_vmaxnm_f64 (float64x1_t a, float64x1_t b)
      13  {
      14    /* { dg-final { scan-assembler-times "fmaxnm\td0, d0, d1" 1 } } */
      15    return vmaxnm_f64 (a, b);
      16  }
      17  
      18  float64x1_t
      19  test_vminnm_f64 (float64x1_t a, float64x1_t b)
      20  {
      21    /* { dg-final { scan-assembler-times "fminnm\td0, d0, d1" 1 } } */
      22    return vminnm_f64 (a, b);
      23  }
      24  
      25  float64x1_t
      26  test_vmax_f64 (float64x1_t a, float64x1_t b)
      27  {
      28    /* { dg-final { scan-assembler-times "fmax\td0, d0, d1" 1 } } */
      29    return vmax_f64 (a, b);
      30  }
      31  
      32  float64x1_t
      33  test_vmin_f64 (float64x1_t a, float64x1_t b)
      34  {
      35    /* { dg-final { scan-assembler-times "fmin\td0, d0, d1" 1 } } */
      36    return vmin_f64 (a, b);
      37  }