(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
aarch64/
vfp-1.c
       1  /* { dg-do compile } */
       2  /* { dg-options "-O2" } */
       3  
       4  extern float fabsf (float);
       5  extern float sqrtf (float);
       6  extern double fabs (double);
       7  extern double sqrt (double);
       8  
       9  volatile float f1, f2, f3;
      10  volatile int cond1, cond2;
      11  
      12  void test_sf() {
      13    /* abssf2 */
      14    /* { dg-final { scan-assembler "fabs\ts\[0-9\]*" } } */
      15    f1 = fabsf (f1);
      16    /* negsf2 */
      17    /* { dg-final { scan-assembler "fneg\ts\[0-9\]*" } } */
      18    f1 = -f1;
      19    /* addsf3 */
      20    /* { dg-final { scan-assembler "fadd\ts\[0-9\]*" } } */
      21    f1 = f2 + f3;
      22    /* subsf3 */
      23    /* { dg-final { scan-assembler "fsub\ts\[0-9\]*" } } */
      24    f1 = f2 - f3;
      25    /* divsf3 */
      26    /* { dg-final { scan-assembler "fdiv\ts\[0-9\]*" } } */
      27    f1 = f2 / f3;
      28    /* mulsf3 */
      29    /* { dg-final { scan-assembler "fmul\ts\[0-9\]*" } } */
      30    f1 = f2 * f3;
      31    /* sqrtsf2 */
      32    /* { dg-final { scan-assembler "fsqrt\ts\[0-9\]*" } } */
      33    f1 = sqrtf (f1);
      34    /* cmpsf */
      35    /* { dg-final { scan-assembler "fcmpe\ts\[0-9\]*" } } */
      36    if (f1 < f2)
      37      cond1 = 1;
      38    else
      39      cond2 = 1;
      40  }
      41  
      42  volatile double d1, d2, d3;
      43  
      44  void test_df() {
      45    /* absdf2 */
      46    /* { dg-final { scan-assembler "fabs\td\[0-9\]*" } } */
      47    d1 = fabs (d1);
      48    /* negdf2 */
      49    /* { dg-final { scan-assembler "fneg\td\[0-9\]*" } } */
      50    d1 = -d1;
      51    /* adddf3 */
      52    /* { dg-final { scan-assembler "fadd\td\[0-9\]*" } } */
      53    d1 = d2 + d3;
      54    /* subdf3 */
      55    /* { dg-final { scan-assembler "fsub\td\[0-9\]*" } } */
      56    d1 = d2 - d3;
      57    /* divdf3 */
      58    /* { dg-final { scan-assembler "fdiv\td\[0-9\]*" } } */
      59    d1 = d2 / d3;
      60    /* muldf3 */
      61    /* { dg-final { scan-assembler "fmul\td\[0-9\]*" } } */
      62    d1 = d2 * d3;
      63    /* sqrtdf2 */
      64    /* { dg-final { scan-assembler "fsqrt\td\[0-9\]*" } } */
      65    d1 = sqrt (d1);
      66    /* cmpdf */
      67    /* { dg-final { scan-assembler "fcmpe\td\[0-9\]*" } } */
      68    if (d1 < d2)
      69      cond1 = 1;
      70    else
      71      cond2 = 1;
      72  }
      73  
      74  volatile int i1;
      75  volatile unsigned int u1;
      76  
      77  void test_convert () {
      78    /* extendsfdf2 */
      79    /* { dg-final { scan-assembler "fcvt\td\[0-9\]*" } } */
      80    d1 = f1;
      81    /* truncdfsf2 */
      82    /* { dg-final { scan-assembler "fcvt\ts\[0-9\]*" } } */
      83    f1 = d1;
      84    /* fixsfsi2 */
      85    /* { dg-final { scan-assembler "fcvtzs\ts\[0-9\], s\[0-9\]*" } } */
      86    i1 = f1;
      87    /* fixdfsi2 */
      88    /* { dg-final { scan-assembler "fcvtzs\tw\[0-9\], d\[0-9\]*" } } */
      89    i1 = d1;
      90    /* fixunsfsi2 */
      91    /* { dg-final { scan-assembler "fcvtzu\ts\[0-9\], s\[0-9\]*" } } */
      92    u1 = f1;
      93    /* fixunsdfsi2 */
      94    /* { dg-final { scan-assembler "fcvtzu\tw\[0-9\], d\[0-9\]*" } } */
      95    u1 = d1;
      96    /* floatsisf2 */
      97    /* { dg-final { scan-assembler "scvtf\ts\[0-9\]*" } } */
      98    f1 = i1;
      99    /* floatsidf2 */
     100    /* { dg-final { scan-assembler "scvtf\td\[0-9\]*" } } */
     101    d1 = i1;
     102    /* floatunssisf2 */
     103    /* { dg-final { scan-assembler "ucvtf\ts\[0-9\]*" } } */
     104    f1 = u1;
     105    /* floatunssidf2 */
     106    /* { dg-final { scan-assembler "ucvtf\td\[0-9\]*" } } */
     107    d1 = u1;
     108  }
     109