1  /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
       2  
       3  #include "test_sve_acle.h"
       4  
       5  /*
       6  ** sri_1_u64_tied1:
       7  **	sri	z0\.d, z1\.d, #1
       8  **	ret
       9  */
      10  TEST_UNIFORM_Z (sri_1_u64_tied1, svuint64_t,
      11  		z0 = svsri_n_u64 (z0, z1, 1),
      12  		z0 = svsri (z0, z1, 1))
      13  
      14  /* Bad RA choice: no preferred output sequence.  */
      15  TEST_UNIFORM_Z (sri_1_u64_tied2, svuint64_t,
      16  		z0 = svsri_n_u64 (z1, z0, 1),
      17  		z0 = svsri (z1, z0, 1))
      18  
      19  /*
      20  ** sri_1_u64_untied:
      21  **	mov	z0\.d, z1\.d
      22  **	sri	z0\.d, z2\.d, #1
      23  **	ret
      24  */
      25  TEST_UNIFORM_Z (sri_1_u64_untied, svuint64_t,
      26  		z0 = svsri_n_u64 (z1, z2, 1),
      27  		z0 = svsri (z1, z2, 1))
      28  
      29  /*
      30  ** sri_2_u64_tied1:
      31  **	sri	z0\.d, z1\.d, #2
      32  **	ret
      33  */
      34  TEST_UNIFORM_Z (sri_2_u64_tied1, svuint64_t,
      35  		z0 = svsri_n_u64 (z0, z1, 2),
      36  		z0 = svsri (z0, z1, 2))
      37  
      38  /* Bad RA choice: no preferred output sequence.  */
      39  TEST_UNIFORM_Z (sri_2_u64_tied2, svuint64_t,
      40  		z0 = svsri_n_u64 (z1, z0, 2),
      41  		z0 = svsri (z1, z0, 2))
      42  
      43  /*
      44  ** sri_2_u64_untied:
      45  **	mov	z0\.d, z1\.d
      46  **	sri	z0\.d, z2\.d, #2
      47  **	ret
      48  */
      49  TEST_UNIFORM_Z (sri_2_u64_untied, svuint64_t,
      50  		z0 = svsri_n_u64 (z1, z2, 2),
      51  		z0 = svsri (z1, z2, 2))
      52  
      53  /*
      54  ** sri_64_u64_tied1:
      55  **	sri	z0\.d, z1\.d, #64
      56  **	ret
      57  */
      58  TEST_UNIFORM_Z (sri_64_u64_tied1, svuint64_t,
      59  		z0 = svsri_n_u64 (z0, z1, 64),
      60  		z0 = svsri (z0, z1, 64))
      61  
      62  /* Bad RA choice: no preferred output sequence.  */
      63  TEST_UNIFORM_Z (sri_64_u64_tied2, svuint64_t,
      64  		z0 = svsri_n_u64 (z1, z0, 64),
      65  		z0 = svsri (z1, z0, 64))
      66  
      67  /*
      68  ** sri_64_u64_untied:
      69  **	mov	z0\.d, z1\.d
      70  **	sri	z0\.d, z2\.d, #64
      71  **	ret
      72  */
      73  TEST_UNIFORM_Z (sri_64_u64_untied, svuint64_t,
      74  		z0 = svsri_n_u64 (z1, z2, 64),
      75  		z0 = svsri (z1, z2, 64))