(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
aarch64/
sve2/
acle/
asm/
cvtlt_f64.c
       1  /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
       2  
       3  #include "test_sve_acle.h"
       4  
       5  /*
       6  ** cvtlt_f64_f32_m_tied1:
       7  **	fcvtlt	z0\.d, p0/m, z4\.s
       8  **	ret
       9  */
      10  TEST_DUAL_Z (cvtlt_f64_f32_m_tied1, svfloat64_t, svfloat32_t,
      11  	     z0 = svcvtlt_f64_f32_m (z0, p0, z4),
      12  	     z0 = svcvtlt_f64_m (z0, p0, z4))
      13  
      14  /* Bad RA choice: no preferred output sequence.  */
      15  TEST_DUAL_Z_REV (cvtlt_f64_f32_m_tied2, svfloat64_t, svfloat32_t,
      16  		 z0_res = svcvtlt_f64_f32_m (z4, p0, z0),
      17  		 z0_res = svcvtlt_f64_m (z4, p0, z0))
      18  
      19  /*
      20  ** cvtlt_f64_f32_m_untied:
      21  ** (
      22  **	mov	z0\.d, z1\.d
      23  **	fcvtlt	z0\.d, p0/m, z4\.s
      24  ** |
      25  **	fcvtlt	z1\.d, p0/m, z4\.s
      26  **	mov	z0\.d, z1\.d
      27  ** )
      28  **	ret
      29  */
      30  TEST_DUAL_Z (cvtlt_f64_f32_m_untied, svfloat64_t, svfloat32_t,
      31  	     z0 = svcvtlt_f64_f32_m (z1, p0, z4),
      32  	     z0 = svcvtlt_f64_m (z1, p0, z4))
      33  
      34  /*
      35  ** cvtlt_f64_f32_x_tied1:
      36  **	fcvtlt	z0\.d, p0/m, z0\.s
      37  **	ret
      38  */
      39  TEST_DUAL_Z_REV (cvtlt_f64_f32_x_tied1, svfloat64_t, svfloat32_t,
      40  		 z0_res = svcvtlt_f64_f32_x (p0, z0),
      41  		 z0_res = svcvtlt_f64_x (p0, z0))
      42  
      43  /*
      44  ** cvtlt_f64_f32_x_untied:
      45  ** (
      46  **	mov	z0\.d, z4\.d
      47  **	fcvtlt	z0\.d, p0/m, z0\.s
      48  ** |
      49  **	fcvtlt	z4\.d, p0/m, z4\.s
      50  **	mov	z0\.d, z4\.d
      51  ** )
      52  **	ret
      53  */
      54  TEST_DUAL_Z (cvtlt_f64_f32_x_untied, svfloat64_t, svfloat32_t,
      55  	     z0 = svcvtlt_f64_f32_x (p0, z4),
      56  	     z0 = svcvtlt_f64_x (p0, z4))
      57  
      58  /*
      59  ** ptrue_cvtlt_f64_f32_x_tied1:
      60  **	...
      61  **	ptrue	p[0-9]+\.b[^\n]*
      62  **	...
      63  **	ret
      64  */
      65  TEST_DUAL_Z_REV (ptrue_cvtlt_f64_f32_x_tied1, svfloat64_t, svfloat32_t,
      66  		 z0_res = svcvtlt_f64_f32_x (svptrue_b64 (), z0),
      67  		 z0_res = svcvtlt_f64_x (svptrue_b64 (), z0))
      68  
      69  /*
      70  ** ptrue_cvtlt_f64_f32_x_untied:
      71  **	...
      72  **	ptrue	p[0-9]+\.b[^\n]*
      73  **	...
      74  **	ret
      75  */
      76  TEST_DUAL_Z (ptrue_cvtlt_f64_f32_x_untied, svfloat64_t, svfloat32_t,
      77  	     z0 = svcvtlt_f64_f32_x (svptrue_b64 (), z4),
      78  	     z0 = svcvtlt_f64_x (svptrue_b64 (), z4))