1  /* { dg-do run { target aarch64_sve_hw } } */
       2  /* { dg-options "-O" } */
       3  /* { dg-options "-O -msve-vector-bits=256" { target aarch64_sve256_hw } } */
       4  
       5  #include "vec_perm_single_1.c"
       6  extern void abort (void);
       7  
       8  #define TEST_VEC_PERM(TYPE, MASK_TYPE, EXPECTED_RESULT, VALUES, MASK)	\
       9  {									\
      10    TYPE expected_result = EXPECTED_RESULT;				\
      11    TYPE values = VALUES;							\
      12    MASK_TYPE mask = MASK;						\
      13    TYPE dest;								\
      14    dest = vec_perm_##TYPE (values, mask);				\
      15    if (__builtin_memcmp (&dest, &expected_result, sizeof (TYPE)) != 0)	\
      16      __builtin_abort ();							\
      17  }
      18  
      19  int main (void)
      20  {
      21    TEST_VEC_PERM (vnx2di, vnx2di,
      22  		 ((vnx2di) { 5, 6, 7, 5 }),
      23  		 ((vnx2di) { 4, 5, 6, 7 }),
      24  		 ((vnx2di) { 1, 6, 3, 5 }));
      25    TEST_VEC_PERM (vnx4si, vnx4si,
      26  		 ((vnx4si) { 4, 8, 10, 10, 9, 8, 7, 5 }),
      27  		 ((vnx4si) { 3, 4, 5, 6, 7, 8, 9, 10 }),
      28  		 ((vnx4si) { 9, 13, 15, 7, 6, 5, 4, 10 }));
      29    TEST_VEC_PERM (vnx8hi, vnx8hi,
      30  		 ((vnx8hi) { 12, 16, 18, 10, 12, 13, 14, 4,
      31  			     7, 18, 3, 5, 9, 8, 7, 13 }),
      32  		 ((vnx8hi) { 3, 4, 5, 6, 7, 8, 9, 10,
      33  			     11, 12, 13, 14, 15, 16, 17, 18 }),
      34  		 ((vnx8hi) { 9, 13, 15, 7, 25, 26, 27, 17,
      35  			     4, 31, 0, 18, 6, 5, 4, 10 }));
      36    TEST_VEC_PERM (vnx16qi, vnx16qi,
      37  		 ((vnx16qi) { 5, 6, 7, 4, 5, 6, 4, 5,
      38  			      6, 7, 4, 5, 6, 7, 4, 5,
      39  			      5, 6, 7, 4, 5, 6, 4, 5,
      40  			      6, 7, 4, 5, 6, 7, 4, 5 }),
      41  		 ((vnx16qi) { 4, 5, 6, 7, 4, 5, 6, 7,
      42  			      4, 5, 6, 7, 4, 5, 6, 7,
      43  			      4, 5, 6, 7, 4, 5, 6, 7,
      44  			      4, 5, 6, 7, 4, 5, 6, 7 }),
      45  		 ((vnx16qi) { 5, 6, 7, 8, 9, 10, 28, 29,
      46  			      30, 31, 32, 33, 54, 55, 56, 61,
      47  			      5, 6, 7, 8, 9, 10, 28, 29,
      48  			      30, 31, 32, 33, 54, 55, 56, 61 }));
      49    TEST_VEC_PERM (vnx2df, vnx2di,
      50  		 ((vnx2df) { 5.1, 6.1, 7.1, 5.1 }),
      51  		 ((vnx2df) { 4.1, 5.1, 6.1, 7.1 }),
      52  		 ((vnx2di) { 1, 6, 3, 5 }));
      53    TEST_VEC_PERM (vnx4sf, vnx4si,
      54  		 ((vnx4sf) { 4.2, 8.2, 10.2, 10.2, 9.2, 8.2, 7.2, 5.2 }),
      55  		 ((vnx4sf) { 3.2, 4.2, 5.2, 6.2, 7.2, 8.2, 9.2, 10.2 }),
      56  		 ((vnx4si) { 9, 13, 15, 7, 6, 5, 4, 10 }));
      57    TEST_VEC_PERM (vnx8hf, vnx8hi,
      58  		 ((vnx8hf) { 12.0, 16.0, 18.0, 10.0, 12.0, 13.0, 14.0, 4.0,
      59  			     7.0, 18.0, 3.0, 5.0, 9.0, 8.0, 7.0, 13.0 }),
      60  		 ((vnx8hf) { 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0,
      61  			     11.0, 12.0, 13.0, 14.0, 15.0, 16.0, 17.0, 18.0 }),
      62  		 ((vnx8hi) { 9, 13, 15, 7, 25, 26, 27, 17,
      63  			     4, 31, 0, 18, 6, 5, 4, 10 }));
      64    return 0;
      65  }