1  /* { dg-do compile } */
       2  /* { dg-options "-O -msve-vector-bits=256" } */
       3  
       4  #include <stdint.h>
       5  
       6  typedef int64_t vnx2di __attribute__((vector_size (32)));
       7  typedef int32_t vnx4si __attribute__((vector_size (32)));
       8  typedef int16_t vnx8hi __attribute__((vector_size (32)));
       9  typedef int8_t vnx16qi __attribute__((vector_size (32)));
      10  typedef double vnx2df __attribute__((vector_size (32)));
      11  typedef float vnx4sf __attribute__((vector_size (32)));
      12  typedef _Float16 vnx8hf __attribute__((vector_size (32)));
      13  
      14  #define VEC_PERM_CONST_OVERRUN(TYPE, MASK)			\
      15  TYPE vec_perm_overrun_##TYPE (TYPE values1, TYPE values2)	\
      16  {								\
      17    return __builtin_shuffle (values1, values2, MASK);		\
      18  }
      19  
      20  VEC_PERM_CONST_OVERRUN (vnx2di,  ((vnx2di)  { 4 + (8 * 1), 3 + (8 * 1),
      21  					      6 + (8 * 2), 1 + (8 * 3) }));
      22  VEC_PERM_CONST_OVERRUN (vnx4si,  ((vnx4si)  { 3 + (16 * 3), 9 + (16 * 4),
      23  					      11 + (16 * 5), 12 + (16 * 3),
      24  					      2 + (16 * 2), 4 + (16 * 1),
      25  					      4 + (16 * 2), 2 + (16 * 1) }));
      26  VEC_PERM_CONST_OVERRUN (vnx8hi,  ((vnx8hi)  { 8 + (32 * 3), 27 + (32 * 1),
      27  					      5 + (32 * 3), 4 + (32 * 3),
      28  					      21 + (32 * 1), 12 + (32 * 3),
      29  					      13 + (32 * 3), 0 + (32 * 1),
      30  					      22 + (32 * 2), 1 + (32 * 2),
      31  					      8 + (32 * 2), 9 + (32 * 1),
      32  					      3 + (32 * 2), 24 + (32 * 2),
      33  					      15 + (32 * 1), 1 + (32 * 1) }));
      34  VEC_PERM_CONST_OVERRUN (vnx16qi, ((vnx16qi) { 13 + (64 * 2), 31 + (64 * 2),
      35  					      11 + (64 * 2), 2 + (64 * 1),
      36  					      48 + (64 * 1), 28 + (64 * 2),
      37  					      3 + (64 * 2), 4 + (64 * 3),
      38  					      54 + (64 * 1), 11 + (64 * 2),
      39  					      30 + (64 * 2), 1 + (64 * 1),
      40  					      0 + (64 * 1), 61 + (64 * 2),
      41  					      2 + (64 * 3), 3 + (64 * 2),
      42  					      4 + (64 * 3), 5 + (64 * 3),
      43  					      11 + (64 * 3), 63 + (64 * 1),
      44  					      24 + (64 * 1), 11 + (64 * 3),
      45  					      42 + (64 * 3), 39 + (64 * 2),
      46  					      2 + (64 * 2), 57 + (64 * 3),
      47  					      22 + (64 * 3), 11 + (64 * 2),
      48  					      6 + (64 * 2), 16 + (64 * 2),
      49  					      18 + (64 * 2), 21 + (64 * 3) }));
      50  VEC_PERM_CONST_OVERRUN (vnx2df,  ((vnx2di)  { 7 + (8 * 1), 3 + (8 * 3),
      51  					      2 + (8 * 5), 1 + (8 * 3) }));
      52  VEC_PERM_CONST_OVERRUN (vnx4sf,  ((vnx4si)  { 1 + (16 * 1), 9 + (16 * 2),
      53  					      13 + (16 * 2), 11 + (16 * 3),
      54  					      2 + (16 * 2), 5 + (16 * 2),
      55  					      4 + (16 * 4), 2 + (16 * 3) }));
      56  VEC_PERM_CONST_OVERRUN (vnx8hf,  ((vnx8hi)  { 8 + (32 * 3), 27 + (32 * 1),
      57  					      5 + (32 * 3), 4 + (32 * 3),
      58  					      21 + (32 * 1), 12 + (32 * 3),
      59  					      13 + (32 * 3), 0 + (32 * 1),
      60  					      22 + (32 * 2), 1 + (32 * 2),
      61  					      8 + (32 * 2), 9 + (32 * 1),
      62  					      3 + (32 * 2), 24 + (32 * 2),
      63  					      15 + (32 * 1), 1 + (32 * 1) }));
      64  
      65  /* { dg-final { scan-assembler-times {\ttbl\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 4 } } */
      66  /* { dg-final { scan-assembler-times {\ttbl\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 4 } } */
      67  /* { dg-final { scan-assembler-times {\ttbl\tz[0-9]+\.h, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */
      68  /* { dg-final { scan-assembler-times {\ttbl\tz[0-9]+\.b, z[0-9]+\.b, z[0-9]+\.b\n} 2 } } */