1  /* { dg-do run { target aarch64_sve_hw } } */
       2  /* { dg-options "-O" } */
       3  /* { dg-options "-O -msve-vector-bits=256" { target aarch64_sve256_hw } } */
       4  
       5  #include "vec_perm_1.c"
       6  
       7  #define TEST_VEC_PERM(TYPE, MASK_TYPE, EXPECTED_RESULT,			\
       8  		      VALUES1, VALUES2, MASK)				\
       9  {									\
      10    TYPE expected_result = EXPECTED_RESULT;				\
      11    TYPE values1 = VALUES1;						\
      12    TYPE values2 = VALUES2;						\
      13    MASK_TYPE mask = MASK;						\
      14    TYPE dest;								\
      15    dest = vec_perm_##TYPE (values1, values2, mask);			\
      16    if (__builtin_memcmp (&dest, &expected_result, sizeof (TYPE)) != 0)	\
      17      __builtin_abort ();							\
      18  }
      19  
      20  int main (void)
      21  {
      22    TEST_VEC_PERM (vnx2di, vnx2di,
      23  		 ((vnx2di) { 5, 36, 7, 48 }),
      24  		 ((vnx2di) { 4, 5, 6, 7 }),
      25  		 ((vnx2di) { 12, 24, 36, 48 }),
      26  		 ((vnx2di) { 1, 6, 3, 7 }));
      27    TEST_VEC_PERM (vnx4si, vnx4si,
      28  		 ((vnx4si) { 34, 38, 40, 10, 9, 8, 7, 35 }),
      29  		 ((vnx4si) { 3, 4, 5, 6, 7, 8, 9, 10 }),
      30  		 ((vnx4si) { 33, 34, 35, 36, 37, 38, 39, 40 }),
      31  		 ((vnx4si) { 9, 13, 15, 7, 6, 5, 4, 10 }));
      32    TEST_VEC_PERM (vnx8hi, vnx8hi,
      33  		 ((vnx8hi) { 12, 16, 18, 10, 42, 43, 44, 34,
      34  			     7, 48, 3, 35, 9, 8, 7, 13 }),
      35  		 ((vnx8hi) { 3, 4, 5, 6, 7, 8, 9, 10,
      36  			     11, 12, 13, 14, 15, 16, 17, 18 }),
      37  		 ((vnx8hi) { 33, 34, 35, 36, 37, 38, 39, 40,
      38  			     41, 42, 43, 44, 45, 46, 47, 48 }),
      39  		 ((vnx8hi) { 9, 13, 15, 7, 25, 26, 27, 17,
      40  			     4, 31, 0, 18, 6, 5, 4, 10 }));
      41    TEST_VEC_PERM (vnx16qi, vnx16qi,
      42  		 ((vnx16qi) { 5, 6, 7, 4, 5, 6, 4, 5,
      43  			      6, 7, 12, 24, 36, 48, 12, 24,
      44  			      5, 6, 7, 4, 5, 6, 4, 5,
      45  			      6, 7, 12, 24, 36, 48, 12, 24 }),
      46  		 ((vnx16qi) { 4, 5, 6, 7, 4, 5, 6, 7,
      47  			      4, 5, 6, 7, 4, 5, 6, 7,
      48  			      4, 5, 6, 7, 4, 5, 6, 7,
      49  			      4, 5, 6, 7, 4, 5, 6, 7 }),
      50  		 ((vnx16qi) { 12, 24, 36, 48, 12, 24, 36, 48,
      51  			      12, 24, 36, 48, 12, 24, 36, 48,
      52  			      12, 24, 36, 48, 12, 24, 36, 48,
      53  			      12, 24, 36, 48, 12, 24, 36, 48 }),
      54  		 ((vnx16qi) { 5, 6, 7, 8, 9, 10, 28, 29,
      55  			      30, 31, 32, 33, 54, 55, 56, 61,
      56  			      5, 6, 7, 8, 9, 10, 28, 29,
      57  			      30, 31, 32, 33, 54, 55, 56, 61 }));
      58    TEST_VEC_PERM (vnx2df, vnx2di,
      59  		 ((vnx2df) { 5.1, 36.1, 7.1, 48.1 }),
      60  		 ((vnx2df) { 4.1, 5.1, 6.1, 7.1 }),
      61  		 ((vnx2df) { 12.1, 24.1, 36.1, 48.1 }),
      62  		 ((vnx2di) { 1, 6, 3, 7 }));
      63    TEST_VEC_PERM (vnx4sf, vnx4si,
      64  		 ((vnx4sf) { 34.2, 38.2, 40.2, 10.2, 9.2, 8.2, 7.2, 35.2 }),
      65  		 ((vnx4sf) { 3.2, 4.2, 5.2, 6.2, 7.2, 8.2, 9.2, 10.2 }),
      66  		 ((vnx4sf) { 33.2, 34.2, 35.2, 36.2,
      67  			     37.2, 38.2, 39.2, 40.2 }),
      68  		 ((vnx4si) { 9, 13, 15, 7, 6, 5, 4, 10 }));
      69    TEST_VEC_PERM (vnx8hf, vnx8hi,
      70  		 ((vnx8hf) { 12.0, 16.0, 18.0, 10.0, 42.0, 43.0, 44.0, 34.0,
      71  			     7.0, 48.0, 3.0, 35.0, 9.0, 8.0, 7.0, 13.0 }),
      72  		 ((vnx8hf) { 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0,
      73  			     11.0, 12.0, 13.0, 14.0, 15.0, 16.0, 17.0, 18.0 }),
      74  		 ((vnx8hf) { 33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0,
      75  			     41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0 }),
      76  		 ((vnx8hi) { 9, 13, 15, 7, 25, 26, 27, 17,
      77  			     4, 31, 0, 18, 6, 5, 4, 10 }));
      78    return 0;
      79  }