1  /* { dg-do assemble { target aarch64_asm_sve_ok } } */
       2  /* { dg-options "-O -msve-vector-bits=256 -mbig-endian --save-temps" } */
       3  
       4  typedef char vnx16qi __attribute__((vector_size(32)));
       5  typedef struct { vnx16qi a[4]; } vnx64qi;
       6  
       7  typedef short vnx8hi __attribute__((vector_size(32)));
       8  typedef struct { vnx8hi a[4]; } vnx32hi;
       9  
      10  typedef int vnx4si __attribute__((vector_size(32)));
      11  typedef struct { vnx4si a[4]; } vnx16si;
      12  
      13  typedef long vnx2di __attribute__((vector_size(32)));
      14  typedef struct { vnx2di a[4]; } vnx8di;
      15  
      16  typedef _Float16 vnx8hf __attribute__((vector_size(32)));
      17  typedef struct { vnx8hf a[4]; } vnx32hf;
      18  
      19  typedef float vnx4sf __attribute__((vector_size(32)));
      20  typedef struct { vnx4sf a[4]; } vnx16sf;
      21  
      22  typedef double vnx2df __attribute__((vector_size(32)));
      23  typedef struct { vnx2df a[4]; } vnx8df;
      24  
      25  #define TEST_TYPE(TYPE, REG1, REG2) \
      26    void \
      27    f_##TYPE (TYPE *a) \
      28    { \
      29      register TYPE x asm (#REG1) = a[0]; \
      30      asm volatile ("# test " #TYPE " 1 %S0" :: "w" (x)); \
      31      register TYPE y asm (#REG2) = x; \
      32      asm volatile ("# test " #TYPE " 2 %S0, %S1, %S2" \
      33  		  : "=&w" (x) : "0" (x), "w" (y)); \
      34      a[1] = x; \
      35    }
      36  
      37  TEST_TYPE (vnx64qi, z0, z4)
      38  TEST_TYPE (vnx32hi, z6, z2)
      39  TEST_TYPE (vnx16si, z12, z16)
      40  TEST_TYPE (vnx8di, z17, z13)
      41  TEST_TYPE (vnx32hf, z18, z1)
      42  TEST_TYPE (vnx16sf, z20, z16)
      43  TEST_TYPE (vnx8df, z24, z28)
      44  
      45  /* { dg-final { scan-assembler {\tld1b\tz0.b, p[0-7]/z, \[x0\]\n} } } */
      46  /* { dg-final { scan-assembler {\tld1b\tz1.b, p[0-7]/z, \[x0, #1, mul vl\]\n} } } */
      47  /* { dg-final { scan-assembler {\tld1b\tz2.b, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
      48  /* { dg-final { scan-assembler {\tld1b\tz3.b, p[0-7]/z, \[x0, #3, mul vl\]\n} } } */
      49  /* { dg-final { scan-assembler { test vnx64qi 1 z0\n} } } */
      50  /* { dg-final { scan-assembler {\tmov\tz4.d, z0.d\n} } } */
      51  /* { dg-final { scan-assembler {\tmov\tz5.d, z1.d\n} } } */
      52  /* { dg-final { scan-assembler {\tmov\tz6.d, z2.d\n} } } */
      53  /* { dg-final { scan-assembler {\tmov\tz7.d, z3.d\n} } } */
      54  /* { dg-final { scan-assembler { test vnx64qi 2 z0, z0, z4\n} } } */
      55  /* { dg-final { scan-assembler {\tst1b\tz0.b, p[0-7], \[x0, #4, mul vl\]\n} } } */
      56  /* { dg-final { scan-assembler {\tst1b\tz1.b, p[0-7], \[x0, #5, mul vl\]\n} } } */
      57  /* { dg-final { scan-assembler {\tst1b\tz2.b, p[0-7], \[x0, #6, mul vl\]\n} } } */
      58  /* { dg-final { scan-assembler {\tst1b\tz3.b, p[0-7], \[x0, #7, mul vl\]\n} } } */
      59  
      60  /* { dg-final { scan-assembler {\tld1h\tz6.h, p[0-7]/z, \[x0\]\n} } } */
      61  /* { dg-final { scan-assembler {\tld1h\tz7.h, p[0-7]/z, \[x0, #1, mul vl\]\n} } } */
      62  /* { dg-final { scan-assembler {\tld1h\tz8.h, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
      63  /* { dg-final { scan-assembler {\tld1h\tz9.h, p[0-7]/z, \[x0, #3, mul vl\]\n} } } */
      64  /* { dg-final { scan-assembler { test vnx32hi 1 z6\n} } } */
      65  /* { dg-final { scan-assembler {\tmov\tz2.d, z6.d\n} } } */
      66  /* { dg-final { scan-assembler {\tmov\tz3.d, z7.d\n} } } */
      67  /* { dg-final { scan-assembler {\tmov\tz4.d, z8.d\n} } } */
      68  /* { dg-final { scan-assembler {\tmov\tz5.d, z9.d\n} } } */
      69  /* { dg-final { scan-assembler { test vnx32hi 2 z6, z6, z2\n} } } */
      70  /* { dg-final { scan-assembler {\tst1h\tz6.h, p[0-7], \[x0, #4, mul vl\]\n} } } */
      71  /* { dg-final { scan-assembler {\tst1h\tz7.h, p[0-7], \[x0, #5, mul vl\]\n} } } */
      72  /* { dg-final { scan-assembler {\tst1h\tz8.h, p[0-7], \[x0, #6, mul vl\]\n} } } */
      73  /* { dg-final { scan-assembler {\tst1h\tz9.h, p[0-7], \[x0, #7, mul vl\]\n} } } */
      74  
      75  /* { dg-final { scan-assembler {\tld1w\tz12.s, p[0-7]/z, \[x0\]\n} } } */
      76  /* { dg-final { scan-assembler {\tld1w\tz13.s, p[0-7]/z, \[x0, #1, mul vl\]\n} } } */
      77  /* { dg-final { scan-assembler {\tld1w\tz14.s, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
      78  /* { dg-final { scan-assembler {\tld1w\tz15.s, p[0-7]/z, \[x0, #3, mul vl\]\n} } } */
      79  /* { dg-final { scan-assembler { test vnx16si 1 z12\n} } } */
      80  /* { dg-final { scan-assembler {\tmov\tz16.d, z12.d\n} } } */
      81  /* { dg-final { scan-assembler {\tmov\tz17.d, z13.d\n} } } */
      82  /* { dg-final { scan-assembler {\tmov\tz18.d, z14.d\n} } } */
      83  /* { dg-final { scan-assembler {\tmov\tz19.d, z15.d\n} } } */
      84  /* { dg-final { scan-assembler { test vnx16si 2 z12, z12, z16\n} } } */
      85  /* { dg-final { scan-assembler {\tst1w\tz12.s, p[0-7], \[x0, #4, mul vl\]\n} } } */
      86  /* { dg-final { scan-assembler {\tst1w\tz13.s, p[0-7], \[x0, #5, mul vl\]\n} } } */
      87  /* { dg-final { scan-assembler {\tst1w\tz14.s, p[0-7], \[x0, #6, mul vl\]\n} } } */
      88  /* { dg-final { scan-assembler {\tst1w\tz15.s, p[0-7], \[x0, #7, mul vl\]\n} } } */
      89  
      90  /* { dg-final { scan-assembler {\tld1d\tz17.d, p[0-7]/z, \[x0\]\n} } } */
      91  /* { dg-final { scan-assembler {\tld1d\tz18.d, p[0-7]/z, \[x0, #1, mul vl\]\n} } } */
      92  /* { dg-final { scan-assembler {\tld1d\tz19.d, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
      93  /* { dg-final { scan-assembler {\tld1d\tz20.d, p[0-7]/z, \[x0, #3, mul vl\]\n} } } */
      94  /* { dg-final { scan-assembler { test vnx8di 1 z17\n} } } */
      95  /* { dg-final { scan-assembler {\tmov\tz13.d, z17.d\n} } } */
      96  /* { dg-final { scan-assembler {\tmov\tz14.d, z18.d\n} } } */
      97  /* { dg-final { scan-assembler {\tmov\tz15.d, z19.d\n} } } */
      98  /* { dg-final { scan-assembler {\tmov\tz16.d, z20.d\n} } } */
      99  /* { dg-final { scan-assembler { test vnx8di 2 z17, z17, z13\n} } } */
     100  /* { dg-final { scan-assembler {\tst1d\tz17.d, p[0-7], \[x0, #4, mul vl\]\n} } } */
     101  /* { dg-final { scan-assembler {\tst1d\tz18.d, p[0-7], \[x0, #5, mul vl\]\n} } } */
     102  /* { dg-final { scan-assembler {\tst1d\tz19.d, p[0-7], \[x0, #6, mul vl\]\n} } } */
     103  /* { dg-final { scan-assembler {\tst1d\tz20.d, p[0-7], \[x0, #7, mul vl\]\n} } } */
     104  
     105  /* { dg-final { scan-assembler {\tld1h\tz18.h, p[0-7]/z, \[x0\]\n} } } */
     106  /* { dg-final { scan-assembler {\tld1h\tz19.h, p[0-7]/z, \[x0, #1, mul vl\]\n} } } */
     107  /* { dg-final { scan-assembler {\tld1h\tz20.h, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
     108  /* { dg-final { scan-assembler {\tld1h\tz21.h, p[0-7]/z, \[x0, #3, mul vl\]\n} } } */
     109  /* { dg-final { scan-assembler { test vnx32hf 1 z18\n} } } */
     110  /* { dg-final { scan-assembler {\tmov\tz1.d, z18.d\n} } } */
     111  /* { dg-final { scan-assembler {\tmov\tz2.d, z19.d\n} } } */
     112  /* { dg-final { scan-assembler {\tmov\tz3.d, z20.d\n} } } */
     113  /* { dg-final { scan-assembler {\tmov\tz4.d, z21.d\n} } } */
     114  /* { dg-final { scan-assembler { test vnx32hf 2 z18, z18, z1\n} } } */
     115  /* { dg-final { scan-assembler {\tst1h\tz18.h, p[0-7], \[x0, #4, mul vl\]\n} } } */
     116  /* { dg-final { scan-assembler {\tst1h\tz19.h, p[0-7], \[x0, #5, mul vl\]\n} } } */
     117  /* { dg-final { scan-assembler {\tst1h\tz20.h, p[0-7], \[x0, #6, mul vl\]\n} } } */
     118  /* { dg-final { scan-assembler {\tst1h\tz21.h, p[0-7], \[x0, #7, mul vl\]\n} } } */
     119  
     120  /* { dg-final { scan-assembler {\tld1w\tz20.s, p[0-7]/z, \[x0\]\n} } } */
     121  /* { dg-final { scan-assembler {\tld1w\tz21.s, p[0-7]/z, \[x0, #1, mul vl\]\n} } } */
     122  /* { dg-final { scan-assembler {\tld1w\tz22.s, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
     123  /* { dg-final { scan-assembler {\tld1w\tz23.s, p[0-7]/z, \[x0, #3, mul vl\]\n} } } */
     124  /* { dg-final { scan-assembler { test vnx16sf 1 z20\n} } } */
     125  /* { dg-final { scan-assembler {\tmov\tz16.d, z20.d\n} } } */
     126  /* { dg-final { scan-assembler {\tmov\tz17.d, z21.d\n} } } */
     127  /* { dg-final { scan-assembler {\tmov\tz18.d, z22.d\n} } } */
     128  /* { dg-final { scan-assembler {\tmov\tz19.d, z23.d\n} } } */
     129  /* { dg-final { scan-assembler { test vnx16sf 2 z20, z20, z16\n} } } */
     130  /* { dg-final { scan-assembler {\tst1w\tz20.s, p[0-7], \[x0, #4, mul vl\]\n} } } */
     131  /* { dg-final { scan-assembler {\tst1w\tz21.s, p[0-7], \[x0, #5, mul vl\]\n} } } */
     132  /* { dg-final { scan-assembler {\tst1w\tz22.s, p[0-7], \[x0, #6, mul vl\]\n} } } */
     133  /* { dg-final { scan-assembler {\tst1w\tz23.s, p[0-7], \[x0, #7, mul vl\]\n} } } */
     134  
     135  /* { dg-final { scan-assembler {\tld1d\tz24.d, p[0-7]/z, \[x0\]\n} } } */
     136  /* { dg-final { scan-assembler {\tld1d\tz25.d, p[0-7]/z, \[x0, #1, mul vl\]\n} } } */
     137  /* { dg-final { scan-assembler {\tld1d\tz26.d, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
     138  /* { dg-final { scan-assembler {\tld1d\tz27.d, p[0-7]/z, \[x0, #3, mul vl\]\n} } } */
     139  /* { dg-final { scan-assembler { test vnx8df 1 z24\n} } } */
     140  /* { dg-final { scan-assembler {\tmov\tz28.d, z24.d\n} } } */
     141  /* { dg-final { scan-assembler {\tmov\tz29.d, z25.d\n} } } */
     142  /* { dg-final { scan-assembler {\tmov\tz30.d, z26.d\n} } } */
     143  /* { dg-final { scan-assembler {\tmov\tz31.d, z27.d\n} } } */
     144  /* { dg-final { scan-assembler { test vnx8df 2 z24, z24, z28\n} } } */
     145  /* { dg-final { scan-assembler {\tst1d\tz24.d, p[0-7], \[x0, #4, mul vl\]\n} } } */
     146  /* { dg-final { scan-assembler {\tst1d\tz25.d, p[0-7], \[x0, #5, mul vl\]\n} } } */
     147  /* { dg-final { scan-assembler {\tst1d\tz26.d, p[0-7], \[x0, #6, mul vl\]\n} } } */
     148  /* { dg-final { scan-assembler {\tst1d\tz27.d, p[0-7], \[x0, #7, mul vl\]\n} } } */